Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians...
[platform/kernel/u-boot.git] / arch / arm / dts / fsl-ls1043a.dtsi
index bb70992..8ca57ea 100644 (file)
@@ -1,7 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
- * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ * Device Tree Include file for NXP Layerscape-1043A family SoC.
  *
+ * Copyright 2020 NXP
  * Copyright (C) 2014-2015, Freescale Semiconductor
  *
  * Mingkai Hu <Mingkai.hu@freescale.com>
@@ -31,7 +32,7 @@
                interrupts = <1 9 0xf08>;
        };
 
-       soc {
+       soc: soc {
                compatible = "simple-bus";
                #address-cells = <2>;
                #size-cells = <2>;
                        status = "disabled";
                };
                qspi: quadspi@1550000 {
-                       compatible = "fsl,vf610-qspi";
+                       compatible = "fsl,ls1021a-qspi";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x0 0x1550000 0x0 0x10000>,
-                               <0x0 0x40000000 0x0 0x4000000>;
+                               <0x0 0x40000000 0x0 0x1000000>;
                        reg-names = "QuadSPI", "QuadSPI-memory";
-                       num-cs = <2>;
-                       big-endian;
                        status = "disabled";
                };
 
                        dr_mode = "host";
                };
 
-               pcie@3400000 {
+               pcie1: pcie@3400000 {
                        compatible = "fsl,ls-pcie", "snps,dw-pcie";
                        reg = <0x00 0x03400000 0x0 0x10000   /* dbi registers */
                               0x00 0x03410000 0x0 0x10000   /* lut registers */
                                  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
                };
 
-               pcie@3500000 {
+               pcie2: pcie@3500000 {
                        compatible = "fsl,ls-pcie", "snps,dw-pcie";
                        reg = <0x00 0x03500000 0x0 0x10000   /* dbi registers */
                               0x00 0x03510000 0x0 0x10000   /* lut registers */
                                  0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
                };
 
-               pcie@3600000 {
+               pcie3: pcie@3600000 {
                        compatible = "fsl,ls-pcie", "snps,dw-pcie";
                        reg = <0x00 0x03600000 0x0 0x10000   /* dbi registers */
                               0x00 0x03610000 0x0 0x10000   /* lut registers */
 
                sata: sata@3200000 {
                        compatible = "fsl,ls1043a-ahci";
-                       reg = <0x0 0x3200000 0x0 0x10000>;
+                       reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
+                              0x0 0x20140520 0x0 0x4>;  /* ecc sata addr*/
+                       reg-names = "sata-base", "ecc-addr";
                        interrupts = <0 69 4>;
                        clocks = <&clockgen 4 0>;
                        status = "disabled";