Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians...

[platform/kernel/u-boot.git] / arch / arm / dts / fsl-ls1028a.dtsi

diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 9911690..d085023 100644 (file)
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -2,7 +2,7 @@
 /*
  * NXP ls1028a SOC common device tree source
  *
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  *
  */
 
@@ -44,6 +44,12 @@
                                         IRQ_TYPE_LEVEL_LOW)>;
        };
 
+       gic_lpi_base: syscon@0x80000000 {
+               compatible = "gic-lpi-base";
+               reg = <0x0 0x80000000 0x0 0x100000>;
+               max-gic-redistributors = <2>;
+       };
+
        timer {
                compatible = "arm,armv8-timer";
                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
@@ -85,7 +91,7 @@
                status = "disabled";
        };
 
-       pcie@3400000 {
+       pcie1: pcie@3400000 {
               compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
               reg = <0x00 0x03400000 0x0 0x80000
                       0x00 0x03480000 0x0 0x40000   /* lut registers */
@@ -101,7 +107,7 @@
                       0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
        };
 
-       pcie@3500000 {
+       pcie2: pcie@3500000 {
               compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
               reg = <0x00 0x03500000 0x0 0x80000
                       0x00 0x03580000 0x0 0x40000   /* lut registers */