dt: socfpga: Import and enable Arria V DK DTS

[platform/kernel/u-boot.git] / arch / arm / dts / Makefile

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ba6dec9..cbe5b86 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -12,7 +12,9 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
        exynos5250-snow.dtb \
        exynos5250-smdk5250.dtb \
        exynos5420-smdk5420.dtb \
-       exynos5420-peach-pit.dtb
+       exynos5420-peach-pit.dtb \
+       exynos5800-peach-pi.dtb \
+       exynos5422-odroidxu3.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
        tegra20-medcom-wide.dtb \
        tegra20-paz00.dtb \
@@ -30,7 +32,13 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
        tegra30-tec-ng.dtb \
        tegra114-dalmore.dtb \
        tegra124-jetson-tk1.dtb \
+       tegra124-nyan-big.dtb \
        tegra124-venice2.dtb
+dtb-$(CONFIG_ARCH_UNIPHIER) += \
+       uniphier-ph1-sld3-ref.dtb \
+       uniphier-ph1-pro4-ref.dtb \
+       uniphier-ph1-ld4-ref.dtb \
+       uniphier-ph1-sld8-ref.dtb
 dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
        zynq-zc706.dtb \
        zynq-zed.dtb \
@@ -41,7 +49,10 @@ dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \
        zynq-zc770-xm013.dtb
 dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb
 
-dtb-$(CONFIG_SOCFPGA) += socfpga_cyclone5_socrates.dtb
+dtb-$(CONFIG_SOCFPGA) +=                               \
+       socfpga_arria5_socdk.dtb                        \
+       socfpga_cyclone5_socdk.dtb                      \
+       socfpga_cyclone5_socrates.dtb
 
 targets += $(dtb-y)