PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X

[platform/kernel/u-boot.git] / arch / arm / cpu / pxa / cpu.c

diff --git a/arch/arm/cpu/pxa/cpu.c b/arch/arm/cpu/pxa/cpu.c
index 9970a4b..7727554 100644 (file)
--- a/arch/arm/cpu/pxa/cpu.c
+++ b/arch/arm/cpu/pxa/cpu.c
@@ -234,21 +234,21 @@ void pxa_gpio_setup(void)
        writel(CONFIG_SYS_GPSR0_VAL, GPSR0);
        writel(CONFIG_SYS_GPSR1_VAL, GPSR1);
        writel(CONFIG_SYS_GPSR2_VAL, GPSR2);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
        writel(CONFIG_SYS_GPSR3_VAL, GPSR3);
 #endif
 
        writel(CONFIG_SYS_GPCR0_VAL, GPCR0);
        writel(CONFIG_SYS_GPCR1_VAL, GPCR1);
        writel(CONFIG_SYS_GPCR2_VAL, GPCR2);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
        writel(CONFIG_SYS_GPCR3_VAL, GPCR3);
 #endif
 
        writel(CONFIG_SYS_GPDR0_VAL, GPDR0);
        writel(CONFIG_SYS_GPDR1_VAL, GPDR1);
        writel(CONFIG_SYS_GPDR2_VAL, GPDR2);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
        writel(CONFIG_SYS_GPDR3_VAL, GPDR3);
 #endif
 
@@ -258,7 +258,7 @@ void pxa_gpio_setup(void)
        writel(CONFIG_SYS_GAFR1_U_VAL, GAFR1_U);
        writel(CONFIG_SYS_GAFR2_L_VAL, GAFR2_L);
        writel(CONFIG_SYS_GAFR2_U_VAL, GAFR2_U);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
        writel(CONFIG_SYS_GAFR3_L_VAL, GAFR3_L);
        writel(CONFIG_SYS_GAFR3_U_VAL, GAFR3_U);
 #endif
@@ -270,7 +270,7 @@ void pxa_interrupt_setup(void)
 {
        writel(0, ICLR);
        writel(0, ICMR);
-#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
        writel(0, ICLR2);
        writel(0, ICMR2);
 #endif
@@ -305,7 +305,7 @@ void pxa_wakeup(void)
                pxa_dram_init();
                icache_disable();
                dcache_disable();
-               asm volatile("mov       pc, %0"::"r"(readl(PSSR)));
+               asm volatile("mov       pc, %0"::"r"(readl(PSPR)));
        }
 }
 
@@ -328,3 +328,19 @@ void i2c_clk_enable(void)
        writel(readl(CKEN) | CKEN14_I2C, CKEN);
 #endif
 }
+
+void reset_cpu(ulong ignored) __attribute__((noreturn));
+
+void reset_cpu(ulong ignored)
+{
+       uint32_t tmp;
+
+       setbits_le32(OWER, OWER_WME);
+
+       tmp = readl(OSCR);
+       tmp += 0x1000;
+       writel(tmp, OSMR3);
+
+       for (;;)
+               ;
+}