// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014-2015 Freescale Semiconductor
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
*/
#include <common.h>
#include <fsl_validate.h>
#endif
#include <fsl_immap.h>
-#ifdef CONFIG_TFABOOT
-#include <env_internal.h>
-#endif
-#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <linux/err.h>
+#ifdef CONFIG_GIC_V3_ITS
DECLARE_GLOBAL_DATA_PTR;
#endif
#ifdef CONFIG_GIC_V3_ITS
-#define PENDTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
-#define PROPTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K)
-#define GIC_LPI_SIZE ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \
- PROPTABLE_MAX_SZ, SZ_1M)
-static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
-{
- u32 phandle;
- int err;
- struct fdt_memory gic_rd_tables;
-
- gic_rd_tables.start = base;
- gic_rd_tables.end = base + size - 1;
- err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
- &phandle);
- if (err < 0)
- debug("%s: failed to add reserved memory: %d\n", __func__, err);
-
- return err;
-}
-
int ls_gic_rd_tables_init(void *blob)
{
- u64 gic_lpi_base;
- int ret;
+ struct fdt_memory lpi_base;
+ fdt_addr_t addr;
+ fdt_size_t size;
+ int offset, ret;
- gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
- ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
- if (ret)
+ offset = fdt_path_offset(gd->fdt_blob, "/syscon@0x80000000");
+ addr = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, offset, "reg",
+ 0, &size, false);
+
+ lpi_base.start = addr;
+ lpi_base.end = addr + size - 1;
+ ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", &lpi_base, NULL, false);
+ if (ret) {
+ debug("%s: failed to add reserved memory\n", __func__);
return ret;
+ }
- ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
+ ret = gic_lpi_tables_init();
if (ret)
debug("%s: failed to init gic-lpi-tables\n", __func__);
out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4)
#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) || \
- defined(CONFIG_ARCH_LS1028A) || defined(CONFIG_ARCH_LX2160A)
+ defined(CONFIG_ARCH_LS1028A) || defined(CONFIG_ARCH_LX2160A) || \
+ defined(CONFIG_ARCH_LX2162A)
#define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \
out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \
#if defined(CONFIG_FSL_LSCH3)
static void erratum_a050106(void)
{
-#if defined(CONFIG_ARCH_LX2160A)
+#if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
void __iomem *dcsr = (void __iomem *)DCSR_BASE;
PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY1);
#endif
#if defined(CONFIG_ARCH_LS1088A) || defined(CONFIG_ARCH_LS1028A) || \
- defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LX2160A)
+ defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LX2160A) || \
+ defined(CONFIG_ARCH_LX2162A)
set_icids();
#endif
}
return 0;
}
+#define DWC3_GSBUSCFG0 0xc100
+#define DWC3_GSBUSCFG0_CACHETYPE_SHIFT 16
+#define DWC3_GSBUSCFG0_CACHETYPE(n) (((n) & 0xffff) \
+ << DWC3_GSBUSCFG0_CACHETYPE_SHIFT)
+
+void enable_dwc3_snooping(void)
+{
+ int ret;
+ u32 val;
+ struct udevice *bus;
+ struct uclass *uc;
+ fdt_addr_t dwc3_base;
+
+ ret = uclass_get(UCLASS_USB, &uc);
+ if (ret)
+ return;
+
+ uclass_foreach_dev(bus, uc) {
+ if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) {
+ dwc3_base = devfdt_get_addr(bus);
+ if (dwc3_base == FDT_ADDR_T_NONE) {
+ dev_err(bus, "dwc3 regs missing\n");
+ continue;
+ }
+ val = in_le32(dwc3_base + DWC3_GSBUSCFG0);
+ val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0);
+ val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222);
+ writel(val, dwc3_base + DWC3_GSBUSCFG0);
+ }
+ }
+}
+
int board_late_init(void)
{
#ifdef CONFIG_CHAIN_OF_TRUST
#endif
#ifdef CONFIG_TFABOOT
/*
- * check if gd->env_addr is default_environment; then setenv bootcmd
- * and mcinitcmd.
- */
-#ifdef CONFIG_SYS_RELOC_GD_ENV_ADDR
- if (gd->env_addr == (ulong)&default_environment[0]) {
-#else
- if (gd->env_addr + gd->reloc_off == (ulong)&default_environment[0]) {
-#endif
- fsl_setenv_bootcmd();
- fsl_setenv_mcinitcmd();
- }
-
- /*
- * If the boot mode is secure, default environment is not present then
- * setenv command needs to be run by default
+ * Set bootcmd and mcinitcmd if they don't exist in the environment.
*/
-#ifdef CONFIG_CHAIN_OF_TRUST
- if ((fsl_check_boot_mode_secure() == 1)) {
+ if (!env_get("bootcmd"))
fsl_setenv_bootcmd();
+ if (!env_get("mcinitcmd"))
fsl_setenv_mcinitcmd();
- }
-#endif
#endif
#ifdef CONFIG_QSPI_AHB_INIT
qspi_ahb_init();
fspi_ahb_init();
#endif
+ if (IS_ENABLED(CONFIG_DM))
+ enable_dwc3_snooping();
+
return fsl_board_late_init();
}
#endif