armv8: fsl-layerscape: Remove unnecessary flushing dcache

[platform/kernel/u-boot.git] / arch / arm / cpu / armv8 / fsl-layerscape / cpu.c

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 6ea28ed..9a5a6b5 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -26,6 +26,14 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static struct mm_region layerscape_mem_map[] = {
+       {
+               /* List terminator */
+               0,
+       }
+};
+struct mm_region *mem_map = layerscape_mem_map;
+
 void cpu_name(char *name)
 {
        struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
@@ -48,6 +56,25 @@ void cpu_name(char *name)
 }
 
 #ifndef CONFIG_SYS_DCACHE_OFF
+static void set_pgtable_section(u64 *page_table, u64 index, u64 section,
+                       u64 memory_type, u64 attribute)
+{
+       u64 value;
+
+       value = section | PTE_TYPE_BLOCK | PTE_BLOCK_AF;
+       value |= PMD_ATTRINDX(memory_type);
+       value |= attribute;
+       page_table[index] = value;
+}
+
+static void set_pgtable_table(u64 *page_table, u64 index, u64 *table_addr)
+{
+       u64 value;
+
+       value = (u64)table_addr | PTE_TYPE_TABLE;
+       page_table[index] = value;
+}
+
 /*
  * Set the block entries according to the information of the table.
  */
@@ -114,10 +141,10 @@ static int find_table(const struct sys_mmu_table *list,
 
                temp_base -= block_size;
 
-               if ((level_table[index - 1] & PMD_TYPE_MASK) ==
-                   PMD_TYPE_TABLE) {
+               if ((level_table[index - 1] & PTE_TYPE_MASK) ==
+                   PTE_TYPE_TABLE) {
                        level_table = (u64 *)(level_table[index - 1] &
-                                     ~PMD_TYPE_MASK);
+                                     ~PTE_TYPE_MASK);
                        level++;
                        continue;
                } else {
@@ -220,7 +247,7 @@ static inline int final_secure_ddr(u64 *level0_table,
        struct table_info table = {};
        struct sys_mmu_table ddr_entry = {
                0, 0, BLOCK_SIZE_L1, MT_NORMAL,
-               PMD_SECT_OUTER_SHARE | PMD_SECT_NS
+               PTE_BLOCK_OUTER_SHARE | PTE_BLOCK_NS
        };
        u64 index;
 
@@ -243,7 +270,7 @@ static inline int final_secure_ddr(u64 *level0_table,
        ddr_entry.virt_addr = phys_addr;
        ddr_entry.phys_addr = phys_addr;
        ddr_entry.size = CONFIG_SYS_MEM_RESERVE_SECURE;
-       ddr_entry.attribute = PMD_SECT_OUTER_SHARE;
+       ddr_entry.attribute = PTE_BLOCK_OUTER_SHARE;
        ret = find_table(&ddr_entry, &table, level0_table);
        if (ret) {
                printf("MMU error: could not find secure ddr table\n");
@@ -369,9 +396,6 @@ static inline void final_mmu_setup(void)
        flush_dcache_range((ulong)level0_table,
                           (ulong)level0_table + gd->arch.tlb_size);
 
-#ifdef CONFIG_SYS_DPAA_FMAN
-       flush_dcache_all();
-#endif
        /* point TTBR to the new table */
        set_ttbr_tcr_mair(el, (u64)level0_table, LAYERSCAPE_TCR_FINAL,
                          MEMORY_ATTRIBUTES);
@@ -383,6 +407,11 @@ static inline void final_mmu_setup(void)
         */
 }
 
+u64 get_page_table_size(void)
+{
+       return 0x10000;
+}
+
 int arch_cpu_init(void)
 {
        icache_enable();
@@ -506,12 +535,12 @@ int print_cpuinfo(void)
        struct sys_info sysinfo;
        char buf[32];
        unsigned int i, core;
-       u32 type, rcw;
+       u32 type, rcw, svr = gur_in32(&gur->svr);
 
        puts("SoC: ");
 
        cpu_name(buf);
-       printf(" %s (0x%x)\n", buf, gur_in32(&gur->svr));
+       printf(" %s (0x%x)\n", buf, svr);
        memset((u8 *)buf, 0x00, ARRAY_SIZE(buf));
        get_sys_info(&sysinfo);
        puts("Clock Configuration:");
@@ -532,7 +561,10 @@ int print_cpuinfo(void)
        printf("  FMAN:     %-4s MHz", strmhz(buf, sysinfo.freq_fman[0]));
 #endif
 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR
-       printf("     DP-DDR:   %-4s MT/s", strmhz(buf, sysinfo.freq_ddrbus2));
+       if (soc_has_dp_ddr()) {
+               printf("     DP-DDR:   %-4s MT/s",
+                      strmhz(buf, sysinfo.freq_ddrbus2));
+       }
 #endif
        puts("\n");