config ARCH_LS1028A
bool
select ARMV8_SET_SMPEN
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
select SYS_FSL_ERRATUM_A011334
select SYS_FSL_ESDHC_UNRELIABLE_PULSE_DETECTION_WORKAROUND
select RESV_RAM if GIC_V3_ITS
+ select SYS_HAS_ARMV8_SECURE_BASE
imply PANIC_HANG
config ARCH_LS1043A
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008850 if !TFABOOT
select SYS_FSL_ERRATUM_A008997
- select SYS_FSL_ERRATUM_A009007
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009660 if !TFABOOT
select SYS_FSL_ERRATUM_A009663 if !TFABOOT
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
+ select SYS_HAS_ARMV8_SECURE_BASE
imply CMD_PCI
imply ID_EEPROM
select SYS_FSL_ERRATUM_A008511 if !TFABOOT
select SYS_FSL_ERRATUM_A008850 if !TFABOOT
select SYS_FSL_ERRATUM_A008997
- select SYS_FSL_ERRATUM_A009007
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009801
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_855873 if !TFABOOT
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_IFC
select FSL_LAYERSCAPE
select FSL_LSCH3
select ARM_ERRATA_828024
select ARM_ERRATA_829520
select ARM_ERRATA_833471
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_IFC
select FSL_LAYERSCAPE
select FSL_LSCH3
config ARCH_LX2162A
bool
select ARMV8_SET_SMPEN
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_DDR_BIST
select FSL_DDR_INTERACTIVE
select FSL_LAYERSCAPE
config ARCH_LX2160A
bool
select ARMV8_SET_SMPEN
+ select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_DDR_BIST
select FSL_DDR_INTERACTIVE
select FSL_LAYERSCAPE
config FSL_LSCH2
bool
select SKIP_LOWLEVEL_INIT
+ select SYS_FSL_CCSR_GUR_BE
+ select SYS_FSL_CCSR_SCFG_BE
+ select SYS_FSL_ESDHC_BE
+ select SYS_FSL_IFC_BE
+ select SYS_FSL_PEX_LUT_BE
select SYS_FSL_HAS_CCI400
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_5
config FSL_LSCH3
select ARCH_MISC_INIT
+ select SYS_FSL_CCSR_GUR_LE
+ select SYS_FSL_CCSR_SCFG_LE
+ select SYS_FSL_ESDHC_LE
+ select SYS_FSL_IFC_LE
+ select SYS_FSL_PEX_LUT_LE
bool
config NXP_LSCH3_2
bool
+config SYS_FSL_CCSR_GUR_BE
+ bool
+
+config SYS_FSL_CCSR_SCFG_BE
+ bool
+
+config SYS_FSL_PEX_LUT_BE
+ bool
+
+config SYS_FSL_CCSR_GUR_LE
+ bool
+
+config SYS_FSL_CCSR_SCFG_LE
+ bool
+
+config SYS_FSL_ESDHC_LE
+ bool
+
+config SYS_FSL_IFC_LE
+ bool
+
+config SYS_FSL_PEX_LUT_LE
+ bool
+
menu "Layerscape architecture"
depends on FSL_LSCH2 || FSL_LSCH3
config FSL_LAYERSCAPE
bool
+ select ARM_SMCCC
config HAS_FEATURE_GIC64K_ALIGN
bool
Enable the EMC2305 fan controller for configuration of fan
speed.
-config NXP_ESBC
- bool "NXP_ESBC"
- help
- Enable Freescale Secure Boot feature
-
config QSPI_AHB_INIT
bool "Init the QSPI AHB bus"
help
depends on SYS_FSL_HAS_DP_DDR
default 2 if ARCH_LS2080A
+config DP_DDR_DIMM_SLOTS_PER_CTLR
+ int
+ depends on SYS_FSL_HAS_DP_DDR
+ default 1 if ARCH_LS2080A
+
config DP_DDR_NUM_CTRLS
int
depends on SYS_FSL_HAS_DP_DDR
bool
depends on SYS_FSL_EC1 || SYS_FSL_EC2
-config SPL_LDSCRIPT
- default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
-
config HAS_FSL_XHCI_USB
bool
help