Merge tag 'tpm-030822' of https://source.denx.de/u-boot/custodians/u-boot-tpm

[platform/kernel/u-boot.git] / arch / arm / cpu / armv8 / fsl-layerscape / Kconfig

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 5a809b4..1f86070 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -26,6 +26,7 @@ config ARCH_LS1012A
 config ARCH_LS1028A
        bool
        select ARMV8_SET_SMPEN
+       select ESBC_HDR_LS if CHAIN_OF_TRUST
        select FSL_LAYERSCAPE
        select FSL_LSCH3
        select GICV3
@@ -138,6 +139,7 @@ config ARCH_LS1088A
        bool
        select ARMV8_SET_SMPEN
        select ARM_ERRATA_855873 if !TFABOOT
+       select ESBC_HDR_LS if CHAIN_OF_TRUST
        select FSL_IFC
        select FSL_LAYERSCAPE
        select FSL_LSCH3
@@ -187,6 +189,7 @@ config ARCH_LS2080A
        select ARM_ERRATA_828024
        select ARM_ERRATA_829520
        select ARM_ERRATA_833471
+       select ESBC_HDR_LS if CHAIN_OF_TRUST
        select FSL_IFC
        select FSL_LAYERSCAPE
        select FSL_LSCH3
@@ -239,6 +242,7 @@ config ARCH_LS2080A
 config ARCH_LX2162A
        bool
        select ARMV8_SET_SMPEN
+       select ESBC_HDR_LS if CHAIN_OF_TRUST
        select FSL_DDR_BIST
        select FSL_DDR_INTERACTIVE
        select FSL_LAYERSCAPE
@@ -277,6 +281,7 @@ config ARCH_LX2162A
 config ARCH_LX2160A
        bool
        select ARMV8_SET_SMPEN
+       select ESBC_HDR_LS if CHAIN_OF_TRUST
        select FSL_DDR_BIST
        select FSL_DDR_INTERACTIVE
        select FSL_LAYERSCAPE
@@ -318,6 +323,11 @@ config ARCH_LX2160A
 config FSL_LSCH2
        bool
        select SKIP_LOWLEVEL_INIT
+       select SYS_FSL_CCSR_GUR_BE
+       select SYS_FSL_CCSR_SCFG_BE
+       select SYS_FSL_ESDHC_BE
+       select SYS_FSL_IFC_BE
+       select SYS_FSL_PEX_LUT_BE
        select SYS_FSL_HAS_CCI400
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_COMPAT_5
@@ -325,11 +335,40 @@ config FSL_LSCH2
 
 config FSL_LSCH3
        select ARCH_MISC_INIT
+       select SYS_FSL_CCSR_GUR_LE
+       select SYS_FSL_CCSR_SCFG_LE
+       select SYS_FSL_ESDHC_LE
+       select SYS_FSL_IFC_LE
+       select SYS_FSL_PEX_LUT_LE
        bool
 
 config NXP_LSCH3_2
        bool
 
+config SYS_FSL_CCSR_GUR_BE
+       bool
+
+config SYS_FSL_CCSR_SCFG_BE
+       bool
+
+config SYS_FSL_PEX_LUT_BE
+       bool
+
+config SYS_FSL_CCSR_GUR_LE
+       bool
+
+config SYS_FSL_CCSR_SCFG_LE
+       bool
+
+config SYS_FSL_ESDHC_LE
+       bool
+
+config SYS_FSL_IFC_LE
+       bool
+
+config SYS_FSL_PEX_LUT_LE
+       bool
+
 menu "Layerscape architecture"
        depends on FSL_LSCH2 || FSL_LSCH3
 
@@ -456,11 +495,6 @@ config EMC2305
         Enable the EMC2305 fan controller for configuration of fan
         speed.
 
-config NXP_ESBC
-       bool "NXP_ESBC"
-       help
-               Enable Freescale Secure Boot feature
-
 config QSPI_AHB_INIT
        bool "Init the QSPI AHB bus"
        help
@@ -511,6 +545,11 @@ config DP_DDR_CTRL
        depends on SYS_FSL_HAS_DP_DDR
        default 2 if ARCH_LS2080A
 
+config DP_DDR_DIMM_SLOTS_PER_CTLR
+       int
+       depends on SYS_FSL_HAS_DP_DDR
+       default 1 if ARCH_LS2080A
+
 config DP_DDR_NUM_CTRLS
        int
        depends on SYS_FSL_HAS_DP_DDR