Merge branch 'master' of git://git.denx.de/u-boot

[platform/kernel/u-boot.git] / arch / arm / cpu / armv8 / cache_v8.c

diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index c22f7b6..b1ea822 100644 (file)
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -12,13 +12,22 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifndef CONFIG_SYS_DCACHE_OFF
-void set_pgtable_section(u64 *page_table, u64 index, u64 section,
-                        u64 memory_type)
+inline void set_pgtable_section(u64 *page_table, u64 index, u64 section,
+                        u64 memory_type, u64 share)
 {
        u64 value;
 
        value = section | PMD_TYPE_SECT | PMD_SECT_AF;
        value |= PMD_ATTRINDX(memory_type);
+       value |= share;
+       page_table[index] = value;
+}
+
+inline void set_pgtable_table(u64 *page_table, u64 index, u64 *table_addr)
+{
+       u64 value;
+
+       value = (u64)table_addr | PMD_TYPE_TABLE;
        page_table[index] = value;
 }
 
@@ -32,7 +41,7 @@ static void mmu_setup(void)
        /* Setup an identity-mapping for all spaces */
        for (i = 0; i < (PGTABLE_SIZE >> 3); i++) {
                set_pgtable_section(page_table, i, i << SECTION_SHIFT,
-                                   MT_DEVICE_NGNRNE);
+                                   MT_DEVICE_NGNRNE, PMD_SECT_NON_SHARE);
        }
 
        /* Setup an identity-mapping for all RAM space */
@@ -42,7 +51,7 @@ static void mmu_setup(void)
                for (j = start >> SECTION_SHIFT;
                     j < end >> SECTION_SHIFT; j++) {
                        set_pgtable_section(page_table, j, j << SECTION_SHIFT,
-                                           MT_NORMAL);
+                                           MT_NORMAL, PMD_SECT_NON_SHARE);
                }
        }
 
@@ -50,15 +59,15 @@ static void mmu_setup(void)
        el = current_el();
        if (el == 1) {
                set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
-                                 TCR_FLAGS | TCR_EL1_IPS_BITS,
+                                 TCR_EL1_RSVD | TCR_FLAGS | TCR_EL1_IPS_BITS,
                                  MEMORY_ATTRIBUTES);
        } else if (el == 2) {
                set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
-                                 TCR_FLAGS | TCR_EL2_IPS_BITS,
+                                 TCR_EL2_RSVD | TCR_FLAGS | TCR_EL2_IPS_BITS,
                                  MEMORY_ATTRIBUTES);
        } else {
                set_ttbr_tcr_mair(el, gd->arch.tlb_addr,
-                                 TCR_FLAGS | TCR_EL3_IPS_BITS,
+                                 TCR_EL3_RSVD | TCR_FLAGS | TCR_EL3_IPS_BITS,
                                  MEMORY_ATTRIBUTES);
        }
        /* enable the mmu */
@@ -180,14 +189,6 @@ void flush_dcache_all(void)
 {
 }
 
-void invalidate_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
-void flush_dcache_range(unsigned long start, unsigned long stop)
-{
-}
-
 void dcache_enable(void)
 {
 }
@@ -261,11 +262,3 @@ void __weak enable_caches(void)
        icache_enable();
        dcache_enable();
 }
-
-/*
- * Flush range from all levels of d-cache/unified-cache
- */
-void flush_cache(unsigned long start, unsigned long size)
-{
-       flush_dcache_range(start, start + size);
-}