Merge branch 'master' of git://git.denx.de/u-boot-sunxi

[platform/kernel/u-boot.git] / arch / arm / cpu / armv8 / Kconfig

diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index c8bebab..f053603 100644 (file)
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -96,6 +96,7 @@ endmenu
 config PSCI_RESET
        bool "Use PSCI for reset and shutdown"
        default y
+       select ARM_SMCCC if OF_CONTROL
        depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && \
                   !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
                   !TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \
@@ -105,7 +106,8 @@ config PSCI_RESET
                   !TARGET_LS1012AFRWY && \
                   !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
                   !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
-                  !TARGET_LS2081ARDB && \
+                  !TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \
+                  !TARGET_LX2160AQDS && \
                   !ARCH_UNIPHIER && !TARGET_S32V234EVB
        help
          Most armv8 systems have PSCI support enabled in EL3, either through
@@ -144,6 +146,13 @@ config ARMV8_PSCI_CPUS_PER_CLUSTER
          A value 0 or no definition of it works for single cluster system.
          System with multi-cluster should difine their own exact value.
 
+config ARMV8_EA_EL3_FIRST
+       bool "External aborts and SError interrupt exception are taken in EL3"
+       default n
+       help
+         Exception handling at all exception levels for External Abort and
+         SError interrupt exception are taken in EL3.
+
 if SYS_HAS_ARMV8_SECURE_BASE
 
 config ARMV8_SECURE_BASE