Merge git://git.denx.de/u-boot-usb

[platform/kernel/u-boot.git] / arch / arm / cpu / armv7 / sunxi / board.c

diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 260b42d..4b2494e 100644 (file)
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -12,8 +12,6 @@
 
 #include <common.h>
 #include <i2c.h>
-#include <netdev.h>
-#include <miiphy.h>
 #include <serial.h>
 #ifdef CONFIG_SPL_BUILD
 #include <spl.h>
@@ -66,10 +64,18 @@ static int gpio_init(void)
        sunxi_gpio_set_cfgpin(SUNXI_GPH(20), SUN6I_GPH_UART0);
        sunxi_gpio_set_cfgpin(SUNXI_GPH(21), SUN6I_GPH_UART0);
        sunxi_gpio_set_pull(SUNXI_GPH(21), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUN9I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(12), SUN9I_GPH_UART0);
+       sunxi_gpio_set_cfgpin(SUNXI_GPH(13), SUN9I_GPH_UART0);
+       sunxi_gpio_set_pull(SUNXI_GPH(13), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
        sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
        sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
        sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
+       sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
+       sunxi_gpio_set_pull(SUNXI_GPB(1), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
        sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL_R_UART);
        sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL_R_UART);
@@ -89,7 +95,7 @@ void spl_board_load_image(void)
 
 void s_init(void)
 {
-#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_A23
        /* Magic (undocmented) value taken from boot0, without this DRAM
         * access gets messed up (seems cache related) */
        setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800);
@@ -113,17 +119,19 @@ void s_init(void)
 #ifdef CONFIG_SPL_BUILD
 /* The sunxi internal brom will try to loader external bootloader
  * from mmc0, nand flash, mmc2.
- * Unfortunately we can't check how SPL was loaded so assume
- * it's always the first SD/MMC controller
+ *
+ * Unfortunately we can't check how SPL was loaded so assume it's
+ * always the first SD/MMC controller, unless it was explicitly
+ * stated that SPL is on nand flash.
  */
 u32 spl_boot_device(void)
 {
-#ifdef CONFIG_SPL_FEL
+#if defined(CONFIG_SPL_NAND_SUPPORT)
        /*
-        * This is the legacy compile time configuration for a special FEL
-        * enabled build. It has many restrictions and can only boot over USB.
+        * This is compile time configuration informing SPL, that it
+        * was loaded from nand flash.
         */
-       return BOOT_DEVICE_BOARD;
+       return BOOT_DEVICE_NAND;
 #else
        /*
         * When booting from the SD card, the "eGON.BT0" signature is expected
@@ -215,18 +223,11 @@ int cpu_eth_init(bd_t *bis)
        __maybe_unused int rc;
 
 #ifdef CONFIG_MACPWR
+       gpio_request(CONFIG_MACPWR, "macpwr");
        gpio_direction_output(CONFIG_MACPWR, 1);
        mdelay(200);
 #endif
 
-#ifdef CONFIG_SUNXI_EMAC
-       rc = sunxi_emac_initialize(bis);
-       if (rc < 0) {
-               printf("sunxi: failed to initialize emac\n");
-               return rc;
-       }
-#endif
-
 #ifdef CONFIG_SUNXI_GMAC
        rc = sunxi_gmac_initialize(bis);
        if (rc < 0) {