*/
.align 4
do_lowlevel_init:
+ ldr r2, =0xFF000044 /* PRR */
+ ldr r1, [r2]
+ and r1, r1, #0x7F00
+ lsrs r1, r1, #8
+ cmp r1, #0x4C /* 0x4C is ID of r8a7794 */
+ beq _enable_actlr_smp
+
/* surpress wfe if ca15 */
tst r4, #4
mrceq p15, 0, r0, c1, c0, 1 /* actlr */
mcreq p15, 0, r0, c1, c0, 1
/* and set l2 latency */
- mrceq p15, 1, r0, c9, c0, 2 /* l2ctlr */
- orreq r0, r0, #0x00000800
- orreq r0, r0, #0x00000003
- mcreq p15, 1, r0, c9, c0, 2
-
mrc p15, 0, r0, c0, c0, 5 /* r0 = MPIDR */
and r0, r0, #0xf00
lsr r0, r0, #8
cmp r1, #3 /* has already been set up */
bicne r0, r0, #0xe7
orrne r0, r0, #0x83 /* L2CTLR[7:6] + L2CTLR[2:0] */
- orrne r0, r0, #0x20 /* L2CTLR[5] */
+#if defined(CONFIG_R8A7790)
+ orrne r0, r0, #0x20 /* L2CTLR[5] */
+#endif
mcrne p15, 1, r0, c9, c0, 2
+ b _exit_init_l2_a15
+
+_enable_actlr_smp: /* R8A7794 only (CA7) */
+#ifndef CONFIG_DCACHE_OFF
+ mrc p15, 0, r0, c1, c0, 1
+ orr r0, r0, #0x40
+ mcr p15, 0, r0, c1, c0, 1
+#endif
+
_exit_init_l2_a15:
ldr r3, =(CONFIG_SYS_INIT_SP_ADDR)
sub sp, r3, #4