Merge branch 'master' of git://git.denx.de/u-boot

[platform/kernel/u-boot.git] / arch / arm / cpu / armv7 / omap5 / prcm-regs.c

diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index cd51fe7..cd289dd 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -11,6 +11,7 @@
  */
 
 #include <asm/omap_common.h>
+#include <asm/io.h>
 
 struct prcm_regs const omap5_es1_prcm = {
        /* cm1.ckgen */
@@ -297,6 +298,10 @@ struct prcm_regs const omap5_es1_prcm = {
 struct omap_sys_ctrl_regs const omap5_ctrl = {
        .control_status                         = 0x4A002134,
        .control_std_fuse_opp_vdd_mpu_2         = 0x4A0021B4,
+       .control_std_fuse_die_id_0              = 0x4A002200,
+       .control_std_fuse_die_id_1              = 0x4A002208,
+       .control_std_fuse_die_id_2              = 0x4A00220C,
+       .control_std_fuse_die_id_3              = 0x4A002210,
        .control_phy_power_usb                  = 0x4A002370,
        .control_phy_power_sata                 = 0x4A002374,
        .control_padconf_core_base              = 0x4A002800,
@@ -379,6 +384,7 @@ struct omap_sys_ctrl_regs const dra7xx_ctrl = {
        .control_phy_power_usb                  = 0x4A002370,
        .control_phy_power_sata                 = 0x4A002374,
        .ctrl_core_sma_sw_0                     = 0x4A0023FC,
+       .ctrl_core_sma_sw_1                     = 0x4A002534,
        .control_core_mac_id_0_lo               = 0x4A002514,
        .control_core_mac_id_0_hi               = 0x4A002518,
        .control_core_mac_id_1_lo               = 0x4A00251C,
@@ -809,6 +815,7 @@ struct prcm_regs const dra7xx_prcm = {
        .cm_clkmode_dpll_gmac                   = 0x4a0052a8,
        .cm_coreaon_usb_phy1_core_clkctrl       = 0x4a008640,
        .cm_coreaon_usb_phy2_core_clkctrl       = 0x4a008688,
+       .cm_coreaon_l3init_60m_gfclk_clkctrl    = 0x4a0086c0,
 
        /* cm1.mpu */
        .cm_mpu_mpu_clkctrl                     = 0x4a005320,
@@ -919,6 +926,7 @@ struct prcm_regs const dra7xx_prcm = {
        .cm_l3init_ocp2scp1_clkctrl             = 0x4a0093e0,
        .cm_l3init_ocp2scp3_clkctrl             = 0x4a0093e8,
        .cm_l3init_usb_otg_ss1_clkctrl          = 0x4a0093f0,
+       .cm_l3init_usb_otg_ss2_clkctrl          = 0x4a009340,
 
        /* cm2.l4per */
        .cm_l4per_clkstctrl                     = 0x4a009700,
@@ -989,4 +997,15 @@ struct prcm_regs const dra7xx_prcm = {
 
        .prm_abbldo_mpu_setup                   = 0x4AE07DDC,
        .prm_abbldo_mpu_ctrl                    = 0x4AE07DE0,
+
+       /*l3main1 edma*/
+       .cm_l3main1_tptc1_clkctrl               = 0x4a008778,
+       .cm_l3main1_tptc2_clkctrl               = 0x4a008780,
 };
+
+void clrset_spare_register(u8 spare_type, u32 clear_bits, u32 set_bits)
+{
+       u32 reg = spare_type ? (*ctrl)->ctrl_core_sma_sw_1 :
+               (*ctrl)->ctrl_core_sma_sw_0;
+       clrsetbits_le32(reg, clear_bits, set_bits);
+}