Merge branch 'master' of git://git.denx.de/u-boot-arm

[kernel/u-boot.git] / arch / arm / cpu / armv7 / omap3 / lowlevel_init.S

diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index ebf69fa..78577b1 100644 (file)
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -8,23 +8,7 @@
  * Richard Woodruff <r-woodruff2@ti.com>
  * Syed Mohammed Khasim <khasim@ti.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <config.h>
@@ -33,9 +17,6 @@
 #include <asm/arch/clocks_omap3.h>
 #include <linux/linkage.h>
 
-_TEXT_BASE:
-       .word   CONFIG_SYS_TEXT_BASE    /* sdram load addr from config.mk */
-
 #ifdef CONFIG_SPL_BUILD
 ENTRY(save_boot_params)
        ldr     r4, =omap3_boot_device
@@ -85,15 +66,13 @@ ENDPROC(do_omap3_emu_romcode_call)
  *************************************************************************/
 ENTRY(cpy_clk_code)
        /* Copy DPLL code into SRAM */
-       adr     r0, go_to_speed         /* get addr of clock setting code */
-       mov     r2, #384                /* r2 size to copy (div by 32 bytes) */
-       mov     r1, r1                  /* r1 <- dest address (passed in) */
-       add     r2, r2, r0              /* r2 <- source end address */
+       adr     r0, go_to_speed         /* copy from start of go_to_speed... */
+       adr     r2, lowlevel_init       /* ... up to start of low_level_init */
 next2:
        ldmia   r0!, {r3 - r10}         /* copy from source address [r0] */
        stmia   r1!, {r3 - r10}         /* copy to   target address [r1] */
        cmp     r0, r2                  /* until source end address [r2] */
-       bne     next2
+       blo     next2
        mov     pc, lr                  /* back to caller */
 ENDPROC(cpy_clk_code)
 
@@ -214,7 +193,7 @@ pll_div_val5:
 
 ENTRY(lowlevel_init)
        ldr     sp, SRAM_STACK
-       str     ip, [sp]        /* stash old link register */
+       str     ip, [sp]        /* stash ip register */
        mov     ip, lr          /* save link reg across call */
 #if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
 /*
@@ -224,12 +203,11 @@ ENTRY(lowlevel_init)
        ldr     r1, =SRAM_CLK_CODE
        bl      cpy_clk_code
 #endif /* NAND Boot */
-       bl      s_init          /* go setup pll, mux, memory */
-       ldr     ip, [sp]        /* restore save ip */
        mov     lr, ip          /* restore link reg */
+       ldr     ip, [sp]        /* restore save ip */
+       /* tail-call s_init to setup pll, mux, memory */
+       b       s_init
 
-       /* back to arch calling code */
-       mov     pc, lr
 ENDPROC(lowlevel_init)
 
        /* the literal pools origin */
@@ -481,6 +459,19 @@ per_36x_dpll_param:
 .word 26000,    432,   12,     9,      16,     9,     4,      3,      1
 .word 38400,    360,   15,     9,      16,     5,     4,      3,      1
 
+per2_36x_dpll_param:
+/* 12MHz */
+.word PER2_36XX_M_12, PER2_36XX_N_12, 0, PER2_36XX_M2_12
+/* 13MHz */
+.word PER2_36XX_M_13, PER2_36XX_N_13, 0, PER2_36XX_M2_13
+/* 19.2MHz */
+.word PER2_36XX_M_19P2, PER2_36XX_N_19P2, 0, PER2_36XX_M2_19P2
+/* 26MHz */
+.word PER2_36XX_M_26, PER2_36XX_N_26, 0, PER2_36XX_M2_26
+/* 38.4MHz */
+.word PER2_36XX_M_38P4, PER2_36XX_N_38P4, 0, PER2_36XX_M2_38P4
+
+
 ENTRY(get_36x_mpu_dpll_param)
        adr     r0, mpu_36x_dpll_param
        mov     pc, lr
@@ -500,3 +491,8 @@ ENTRY(get_36x_per_dpll_param)
        adr     r0, per_36x_dpll_param
        mov     pc, lr
 ENDPROC(get_36x_per_dpll_param)
+
+ENTRY(get_36x_per2_dpll_param)
+       adr     r0, per2_36x_dpll_param
+       mov     pc, lr
+ENDPROC(get_36x_per2_dpll_param)