* Copyright (C) 2008 Ronetix Ilko Iliev (www.ronetix.at)
* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <asm/arch/at91sam9_sdramc.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_rstc.h>
-#ifdef CONFIG_AT91_LEGACY
+#ifdef CONFIG_ATMEL_LEGACY
#include <asm/arch/at91sam9_matrix.h>
#endif
#ifndef CONFIG_SYS_MATRIX_EBICSA_VAL
#endif
_TEXT_BASE:
- .word TEXT_BASE
+ .word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
.type lowlevel_init,function
ldr r0, =POS1 /* r0 = POS1 compile */
ldr r2, _TEXT_BASE
sub r0, r0, r2 /* r0 = POS1-_TEXT_BASE (POS1 relative) */
- sub r5, r5, r0 /* r0 = TEXT_BASE-1 */
+ sub r5, r5, r0 /* r0 = CONFIG_SYS_TEXT_BASE-1 */
sub r5, r5, #4 /* r1 = text base - current */
/* memory control configuration 1 */
.word CONFIG_SYS_SDRC_MDR_VAL
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL2
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL1
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL3
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL2
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL3
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL4
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL5
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL6
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL7
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL8
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL9
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL4
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL10
.word AT91_ASM_SDRAMC_MR
.word CONFIG_SYS_SDRC_MR_VAL5
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL11
.word AT91_ASM_SDRAMC_TR
.word CONFIG_SYS_SDRC_TR_VAL2
- .word AT91_SDRAM_BASE
+ .word CONFIG_SYS_SDRAM_BASE
.word CONFIG_SYS_SDRAM_VAL12
/* User reset enable*/
.word AT91_ASM_RSTC_MR