Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig

[platform/kernel/u-boot.git] / arch / arm / cpu / arm920t / start.S

diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 0740450..02cbda9 100644 (file)
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -1,11 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  *  armboot - Startup Code for ARM920 CPU-core
  *
  *  Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
  *  Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  *  Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <asm-offsets.h>
@@ -36,7 +35,7 @@ reset:
        orr     r0, r0, #0xd3
        msr     cpsr, r0
 
-#if    defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
+#if    defined(CONFIG_AT91RM9200DK)
        /*
         * relocate exception table
         */
@@ -50,48 +49,11 @@ copyex:
        bne     copyex
 #endif
 
-#ifdef CONFIG_S3C24X0
-       /* turn off the watchdog */
-
-# if defined(CONFIG_S3C2400)
-#  define pWTCON       0x15300000
-#  define INTMSK       0x14400008      /* Interrupt-Controller base addresses */
-#  define CLKDIVN      0x14800014      /* clock divisor register */
-#else
-#  define pWTCON       0x53000000
-#  define INTMSK       0x4A000008      /* Interrupt-Controller base addresses */
-#  define INTSUBMSK    0x4A00001C
-#  define CLKDIVN      0x4C000014      /* clock divisor register */
-# endif
-
-       ldr     r0, =pWTCON
-       mov     r1, #0x0
-       str     r1, [r0]
-
-       /*
-        * mask all IRQs by setting all bits in the INTMR - default
-        */
-       mov     r1, #0xffffffff
-       ldr     r0, =INTMSK
-       str     r1, [r0]
-# if defined(CONFIG_S3C2410)
-       ldr     r1, =0x3ff
-       ldr     r0, =INTSUBMSK
-       str     r1, [r0]
-# endif
-
-       /* FCLK:HCLK:PCLK = 1:2:4 */
-       /* default FCLK is 120 MHz ! */
-       ldr     r0, =CLKDIVN
-       mov     r1, #3
-       str     r1, [r0]
-#endif /* CONFIG_S3C24X0 */
-
        /*
         * we do sys-critical inits only at reboot,
         * not when booting from ram!
         */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
        bl      cpu_init_crit
 #endif
 
@@ -116,7 +78,7 @@ c_runtime_cpu_setup:
  */
 
 
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
 cpu_init_crit:
        /*
         * flush v4 I/D caches
@@ -131,10 +93,11 @@ cpu_init_crit:
        mrc     p15, 0, r0, c1, c0, 0
        bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
        bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
-       orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
+       orr     r0, r0, #0x00000002     @ set bit 1 (A) Align
        orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
        mcr     p15, 0, r0, c1, c0, 0
 
+#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT_ONLY)
        /*
         * before relocating, we have to setup RAM timing
         * because memory timing is board-dependend, you will
@@ -143,7 +106,7 @@ cpu_init_crit:
        mov     ip, lr
 
        bl      lowlevel_init
-
        mov     lr, ip
+#endif
        mov     pc, lr
-#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+#endif /* CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */