* Copyright (C) 2008
* Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
*
- * SPDX-License-Identifier: GPL-2.0+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
*
* 2007-09-21 - Restructured codes by jsgood (jsgood.yang@samsung.com)
* 2007-09-21 - Added MoviNAND and OneNAND boot codes by
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
+#ifdef CONFIG_ENABLE_MMU
+#include <asm/proc/domain.h>
+#endif
-#ifndef CONFIG_SYS_PHY_UBOOT_BASE
+#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE
#endif
.globl _start
_start: b reset
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_NAND_SPL
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
*************************************************************************
*/
+.globl _TEXT_BASE
+_TEXT_BASE:
+ .word CONFIG_SYS_TEXT_BASE
+
+/*
+ * Below variable is very important because we use MMU in U-Boot.
+ * Without it, we cannot run code correctly before MMU is ON.
+ * by scsuh.
+ */
+_TEXT_PHY_BASE:
+ .word CONFIG_SYS_PHY_UBOOT_BASE
+
+/*
+ * These are defined in the board-specific linker script.
+ * Subtracting _start from them lets the linker put their
+ * relative position in the executable instead of leaving
+ * them null.
+ */
+
+.globl _bss_start_ofs
+_bss_start_ofs:
+ .word __bss_start - _start
+
+.globl _bss_end_ofs
+_bss_end_ofs:
+ .word __bss_end__ - _start
+
+.globl _end_ofs
+_end_ofs:
+ .word _end - _start
+
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
* When booting from NAND - it has definitely been a reset, so, no need
* to flush caches and disable the MMU
*/
-#ifndef CONFIG_SPL_BUILD
+#ifndef CONFIG_NAND_SPL
/*
* flush v4 I/D caches
*/
*/
bl lowlevel_init /* go setup pll,mux,memory */
- bl _main
+/* Set stackpointer in internal RAM to call board_init_f */
+call_board_init_f:
+ ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
+ ldr r0,=0x00000000
+ bl board_init_f
/*------------------------------------------------------------------------------*/
- .globl c_runtime_cpu_setup
-c_runtime_cpu_setup:
+/*
+ * void relocate_code (addr_sp, gd, addr_moni)
+ *
+ * This "function" does not return, instead it continues in RAM
+ * after relocating the monitor code.
+ *
+ */
+ .globl relocate_code
+relocate_code:
+ mov r4, r0 /* save addr_sp */
+ mov r5, r1 /* save addr of gd */
+ mov r6, r2 /* save addr of destination */
+
+ /* Set up the stack */
+stack_setup:
+ mov sp, r4
+
+ adr r0, _start
+ cmp r0, r6
+ beq clear_bss /* skip relocation */
+ mov r1, r6 /* r1 <- scratch for copy_loop */
+ ldr r3, _bss_start_ofs
+ add r2, r0, r3 /* r2 <- source end address */
+
+copy_loop:
+ ldmia r0!, {r9-r10} /* copy from source address [r0] */
+ stmia r1!, {r9-r10} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end address [r2] */
+ blo copy_loop
+
+#ifndef CONFIG_PRELOADER
+ /*
+ * fix .rel.dyn relocations
+ */
+ ldr r0, _TEXT_BASE /* r0 <- Text base */
+ sub r9, r6, r0 /* r9 <- relocation offset */
+ ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
+ add r10, r10, r0 /* r10 <- sym table in FLASH */
+ ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
+ add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
+ ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
+ add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
+fixloop:
+ ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
+ add r0, r0, r9 /* r0 <- location to fix up in RAM */
+ ldr r1, [r2, #4]
+ and r7, r1, #0xff
+ cmp r7, #23 /* relative fixup? */
+ beq fixrel
+ cmp r7, #2 /* absolute fixup? */
+ beq fixabs
+ /* ignore unknown type of fixup */
+ b fixnext
+fixabs:
+ /* absolute fix: set location to (offset) symbol value */
+ mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
+ add r1, r10, r1 /* r1 <- address of symbol in table */
+ ldr r1, [r1, #4] /* r1 <- symbol value */
+ add r1, r1, r9 /* r1 <- relocated sym addr */
+ b fixnext
+fixrel:
+ /* relative fix: increase location by offset */
+ ldr r1, [r0]
+ add r1, r1, r9
+fixnext:
+ str r1, [r0]
+ add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
+ cmp r2, r3
+ blo fixloop
+#endif
+
+#ifdef CONFIG_ENABLE_MMU
+enable_mmu:
+ /* enable domain access */
+ ldr r5, =0x0000ffff
+ mcr p15, 0, r5, c3, c0, 0 /* load domain access register */
+
+ /* Set the TTB register */
+ ldr r0, _mmu_table_base
+ ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
+ ldr r2, =0xfff00000
+ bic r0, r0, r2
+ orr r1, r0, r1
+ mcr p15, 0, r1, c2, c0, 0
+
+ /* Enable the MMU */
+ mrc p15, 0, r0, c1, c0, 0
+ orr r0, r0, #1 /* Set CR_M to enable MMU */
+
+ /* Prepare to enable the MMU */
+ adr r1, skip_hw_init
+ and r1, r1, #0x3fc
+ ldr r2, _TEXT_BASE
+ ldr r3, =0xfff00000
+ and r2, r2, r3
+ orr r2, r2, r1
+ b mmu_enable
+
+ .align 5
+ /* Run in a single cache-line */
+mmu_enable:
+
+ mcr p15, 0, r0, c1, c0, 0
+ nop
+ nop
+ mov pc, r2
+skip_hw_init:
+#endif
+
+clear_bss:
+#ifndef CONFIG_PRELOADER
+ ldr r0, _bss_start_ofs
+ ldr r1, _bss_end_ofs
+ mov r4, r6 /* reloc addr */
+ add r0, r0, r4
+ add r1, r1, r4
+ mov r2, #0x00000000 /* clear */
+
+clbss_l:str r2, [r0] /* clear loop... */
+ add r0, r0, #4
+ cmp r0, r1
+ bne clbss_l
+
+#ifndef CONFIG_NAND_SPL
+ bl coloured_LED_init
+ bl red_LED_on
+#endif
+#endif
+/*
+ * We are done. Do not return, instead branch to second part of board
+ * initialization, now running from RAM.
+ */
+#ifdef CONFIG_NAND_SPL
+ ldr pc, _nand_boot
+
+_nand_boot: .word nand_boot
+#else
+ ldr r0, _board_init_r_ofs
+ adr r1, _start
+ add lr, r0, r1
+ add lr, lr, r9
+ /* setup parameters for board_init_r */
+ mov r0, r5 /* gd_t */
+ mov r1, r6 /* dest_addr */
+ /* jump to it ... */
mov pc, lr
-#ifndef CONFIG_SPL_BUILD
+_board_init_r_ofs:
+ .word board_init_r - _start
+#endif
+
+_rel_dyn_start_ofs:
+ .word __rel_dyn_start - _start
+_rel_dyn_end_ofs:
+ .word __rel_dyn_end - _start
+_dynsym_start_ofs:
+ .word __dynsym_start - _start
+
+#ifdef CONFIG_ENABLE_MMU
+_mmu_table_base:
+ .word mmu_table
+#endif
+
+#ifndef CONFIG_NAND_SPL
+/*
+ * we assume that cache operation is done before. (eg. cleanup_before_linux())
+ * actually, we don't need to do anything about cache if not use d-cache in
+ * U-Boot. So, in this function we clean only MMU. by scsuh
+ *
+ * void theLastJump(void *kernel, int arch_num, uint boot_params);
+ */
+#ifdef CONFIG_ENABLE_MMU
+ .globl theLastJump
+theLastJump:
+ mov r9, r0
+ ldr r3, =0xfff00000
+ ldr r4, _TEXT_PHY_BASE
+ adr r5, phy_last_jump
+ bic r5, r5, r3
+ orr r5, r5, r4
+ mov pc, r5
+phy_last_jump:
+ /*
+ * disable MMU stuff
+ */
+ mrc p15, 0, r0, c1, c0, 0
+ bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
+ bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
+ orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
+ orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
+ mcr p15, 0, r0, c1, c0, 0
+
+ mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
+
+ mov r0, #0
+ mov pc, r9
+#endif
+
+
/*
*************************************************************************
*
/* save caller lr in position 0 of saved stack */
str lr, [r0]
/* get the spsr */
- mrs lr, spsr
+ mrs r0, spsr
/* save spsr in position 1 of saved stack */
str lr, [r0, #4]
- /* restore lr */
- ldr lr, [r0]
/* restore r0 */
ldr r0, [r13]
/* pop stack entry */
get_bad_stack
bad_save_user_regs
bl do_fiq
-#endif /* CONFIG_SPL_BUILD */
+#endif /* CONFIG_NAND_SPL */
projects / platform / kernel / u-boot.git / blobdiff