#include <common.h>
#include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
#include <div64.h>
#include <watchdog.h>
#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
-/* "time" is measured in 1 / CONFIG_SYS_HZ seconds, "tick" is internal timer period */
+/*
+ * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
+ * "tick" is internal timer period
+ */
+
#ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
/* ~0.4% error - measured with stop-watch on 100s boot-delay */
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
- do_div(tick, CONFIG_MX31_CLK32);
+ do_div(tick, MXC_CLK32);
return tick;
}
static inline unsigned long long time_to_tick(unsigned long long time)
{
- time *= CONFIG_MX31_CLK32;
+ time *= MXC_CLK32;
do_div(time, CONFIG_SYS_HZ);
return time;
}
static inline unsigned long long us_to_tick(unsigned long long us)
{
- us = us * CONFIG_MX31_CLK32 + 999999;
+ us = us * MXC_CLK32 + 999999;
do_div(us, 1000000);
return us;
}
#else
/* ~2% error */
-#define TICK_PER_TIME ((CONFIG_MX31_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
-#define US_PER_TICK (1000000 / CONFIG_MX31_CLK32)
+#define TICK_PER_TIME ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
+#define US_PER_TICK (1000000 / MXC_CLK32)
static inline unsigned long long tick_to_time(unsigned long long tick)
{
#endif
/* The 32768Hz 32-bit timer overruns in 131072 seconds */
-int timer_init (void)
+int timer_init(void)
{
int i;
return 0;
}
-unsigned long long get_ticks (void)
+unsigned long long get_ticks(void)
{
ulong now = GPTCNT; /* current tick value */
- if (now >= gd->lastinc) /* normal mode (non roll) */
+ if (now >= gd->arch.lastinc) /* normal mode (non roll) */
/* move stamp forward with absolut diff ticks */
- gd->tbl += (now - gd->lastinc);
+ gd->arch.tbl += (now - gd->arch.lastinc);
else /* we have rollover of incrementer */
- gd->tbl += (0xFFFFFFFF - gd->lastinc) + now;
- gd->lastinc = now;
- return gd->tbl;
+ gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
+ gd->arch.lastinc = now;
+ return gd->arch.tbl;
}
-ulong get_timer_masked (void)
+ulong get_timer_masked(void)
{
/*
* get_ticks() returns a long long (64 bit), it wraps in
- * 2^64 / CONFIG_MX31_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
+ * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
* 5 * 10^6 days - long enough.
*/
return tick_to_time(get_ticks());
}
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
- return get_timer_masked () - base;
+ return get_timer_masked() - base;
}
/* delay x useconds AND preserve advance timestamp value */
-void __udelay (unsigned long usec)
+void __udelay(unsigned long usec)
{
unsigned long long tmp;
ulong tmo;
/*NOP*/;
}
-void reset_cpu (ulong addr)
-{
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
- wdog->wcr = WDOG_ENABLE;
- while (1)
- ;
-}
-
-#ifdef CONFIG_HW_WATCHDOG
-void mxc_hw_watchdog_enable(void)
-{
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
- u16 secs;
-
- /*
- * The timer watchdog can be set between
- * 0.5 and 128 Seconds. If not defined
- * in configuration file, sets 64 Seconds
- */
-#ifdef CONFIG_SYS_WD_TIMER_SECS
- secs = (CONFIG_SYS_WD_TIMER_SECS << 1) & 0xFF;
- if (!secs) secs = 1;
-#else
- secs = 64;
-#endif
- writew(readw(&wdog->wcr) | (secs << WDOG_WT_SHIFT) | WDOG_ENABLE,
- &wdog->wcr);
-}
-
-
-void mxc_hw_watchdog_reset(void)
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
{
- struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE;
-
- writew(0x5555, &wdog->wsr);
- writew(0xAAAA, &wdog->wsr);
+ return MXC_CLK32;
}
-#endif