ARM: ux500: move old HREF ipgpio to the device tree

[platform/adaptation/renesas_rcar/renesas_kernel.git] / arch / arm / boot / dts / ste-hrefprev60.dtsi

diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi
index b2cd7bc..b0f5def 100644 (file)
--- a/arch/arm/boot/dts/ste-hrefprev60.dtsi
+++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi
@@ -28,18 +28,20 @@
                                reg = <0x33>;
                        };
 
-                       tc3589x@42 {
-                               compatible = "tc3589x";
+                       tc35892@42 {
+                               compatible = "toshiba,tc35892";
                                reg = <0x42>;
                                interrupt-parent = <&gpio6>;
                                interrupts = <25 IRQ_TYPE_EDGE_RISING>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&tc35892_hrefprev60_mode>;
 
                                interrupt-controller;
-                               #interrupt-cells = <2>;
+                               #interrupt-cells = <1>;
 
                                tc3589x_gpio: tc3589x_gpio {
                                        compatible = "tc3589x-gpio";
-                                       interrupts = <0 IRQ_TYPE_EDGE_RISING>;
+                                       interrupts = <0>;
 
                                        interrupt-controller;
                                        #interrupt-cells = <2>;
@@ -49,11 +51,74 @@
                        };
                };
 
+               ssp@80002000 {
+                       /*
+                        * On the first generation boards, this SSP/SPI port was connected
+                        * to the AB8500.
+                        */
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&ssp0_hrefprev60_mode>;
+               };
+
                vmmci: regulator-gpio {
                        gpios = <&tc3589x_gpio 18 0x4>;
                        enable-gpio = <&tc3589x_gpio 17 0x4>;
 
                        status = "okay";
                };
+
+               pinctrl {
+                       /* Set this up using hogs */
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&ipgpio_hrefprev60_mode>;
+
+                       ssp0 {
+                               ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
+                                       hrefprev60_mux {
+                                               ste,function = "ssp0";
+                                               ste,pins = "ssp0_a_1";
+                                       };
+                                       hrefprev60_cfg1 {
+                                               ste,pins = "GPIO145_C13"; /* RXD */
+                                               ste,config = <&in_pd>;
+                                       };
+
+                               };
+                       };
+                       sdi0 {
+                               /* This additional pin needed on early MOP500 and HREFs previous to v60 */
+                               sdi0_default_mode: sdi0_default {
+                                       hrefprev60_mux {
+                                               ste,function = "mc0";
+                                               ste,pins = "mc0dat31dir_a_1";
+                                       };
+                                       hrefprev60_cfg1 {
+                                               ste,pins = "GPIO21_AB3"; /* DAT31DIR */
+                                               ste,config = <&out_hi>;
+                                       };
+
+                               };
+                       };
+                       tc35892 {
+                               tc35892_hrefprev60_mode: tc35892_hrefprev60 {
+                                       hrefprev60_cfg {
+                                               ste,pins = "GPIO217_AH12";
+                                               ste,config = <&gpio_in_pu>;
+                                       };
+                               };
+                       };
+                       ipgpio {
+                                ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
+                                       hrefprev60_mux {
+                                               ste,function = "ipgpio";
+                                               ste,pins = "ipgpio0_c_1", "ipgpio1_c_1";
+                                       };
+                                       hrefprev60_cfg1 {
+                                               ste,pins = "GPIO6_AF6", "GPIO7_AG5";
+                                               ste,config = <&in_pu>;
+                                       };
+                                };
+                       };
+               };
        };
 };