r8a7791: add SGX device to devicetree

[platform/adaptation/renesas_rcar/renesas_kernel.git] / arch / arm / boot / dts / r8a7791.dtsi

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index e5c9614..7ba61d1 100644 (file)
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -357,6 +357,13 @@
                dma-channels = <13>;
        };
 
+       audmapp: dma-controller@ec740000 {
+               compatible = "renesas,rcar-audmapp";
+               #dma-cells = <1>;
+
+               reg = <0 0xec740000 0 0x200>;
+       };
+
        /* The memory map in the User's Manual maps the cores to bus numbers */
        i2c0: i2c@e6508000 {
                #address-cells = <1>;
@@ -427,6 +434,8 @@
                reg = <0 0xe60b0000 0 0x425>;
                interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
+               dmas = <&dmac0 0x77>, <&dmac0 0x78>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
@@ -437,6 +446,8 @@
                reg = <0 0xe6500000 0 0x425>;
                interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
+               dmas = <&dmac0 0x61>, <&dmac0 0x62>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
@@ -447,6 +458,8 @@
                reg = <0 0xe6510000 0 0x425>;
                interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
+               dmas = <&dmac0 0x65>, <&dmac0 0x66>;
+               dma-names = "tx", "rx";
                status = "disabled";
        };
 
@@ -803,6 +816,9 @@
                };
        };
 
+       pvrsrvkm@fd800000 {
+       };
+
        clocks {
                #address-cells = <2>;
                #size-cells = <2>;
@@ -1095,16 +1111,19 @@
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
                        clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
-                                <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>;
+                                <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>,
+                                <&hp_clk>, <&hp_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
                                R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
                                R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1
                                R8A7791_CLK_SSUSB R8A7791_CLK_CMT1
+                               R8A7791_CLK_USBDMAC0 R8A7791_CLK_USBDMAC1
                        >;
                        clock-output-names =
                                "tpu0", "sdhi2", "sdhi1", "sdhi0",
-                               "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1";
+                               "mmcif0", "i2c7", "pciec", "i2c8", "ssusb", "cmt1",
+                               "usbdmac0", "usbdmac1";
                };
                mstp5_clks: mstp5_clks@e6150144 {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";