Merge tag 'backport/v3.14.24-ltsi-rc1/phy-rcar-gen2-usb-to-v3.15' into backport/v3...

[platform/adaptation/renesas_rcar/renesas_kernel.git] / arch / arm / boot / dts / r8a7779.dtsi

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 58d0d95..7cfba9a 100644 (file)
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -199,7 +199,6 @@
        scif0: serial@ffe40000 {
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe40000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cpg_clocks R8A7779_CLK_P>;
                clock-names = "sci_ick";
@@ -209,7 +208,6 @@
        scif1: serial@ffe41000 {
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe41000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cpg_clocks R8A7779_CLK_P>;
                clock-names = "sci_ick";
@@ -219,7 +217,6 @@
        scif2: serial@ffe42000 {
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe42000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cpg_clocks R8A7779_CLK_P>;
                clock-names = "sci_ick";
@@ -229,7 +226,6 @@
        scif3: serial@ffe43000 {
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe43000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cpg_clocks R8A7779_CLK_P>;
                clock-names = "sci_ick";
@@ -239,7 +235,6 @@
        scif4: serial@ffe44000 {
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe44000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cpg_clocks R8A7779_CLK_P>;
                clock-names = "sci_ick";
@@ -249,7 +244,6 @@
        scif5: serial@ffe45000 {
                compatible = "renesas,scif-r8a7779", "renesas,scif";
                reg = <0xffe45000 0x100>;
-               interrupt-parent = <&gic>;
                interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cpg_clocks R8A7779_CLK_P>;
                clock-names = "sci_ick";
@@ -262,10 +256,52 @@
        };
 
        thermal@ffc48000 {
-               compatible = "renesas,rcar-thermal";
+               compatible = "renesas,thermal-r8a7779", "renesas,rcar-thermal";
                reg = <0xffc48000 0x38>;
        };
 
+       tmu0: timer@ffd80000 {
+               compatible = "renesas,tmu-r8a7779", "renesas,tmu";
+               reg = <0xffd80000 0x30>;
+               interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 33 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 34 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
+               clock-names = "fck";
+
+               #renesas,channels = <3>;
+
+               status = "disabled";
+       };
+
+       tmu1: timer@ffd81000 {
+               compatible = "renesas,tmu-r8a7779", "renesas,tmu";
+               reg = <0xffd81000 0x30>;
+               interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 37 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 38 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7779_CLK_TMU1>;
+               clock-names = "fck";
+
+               #renesas,channels = <3>;
+
+               status = "disabled";
+       };
+
+       tmu2: timer@ffd82000 {
+               compatible = "renesas,tmu-r8a7779", "renesas,tmu";
+               reg = <0xffd82000 0x30>;
+               interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 41 IRQ_TYPE_LEVEL_HIGH>,
+                            <0 42 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7779_CLK_TMU2>;
+               clock-names = "fck";
+
+               #renesas,channels = <3>;
+
+               status = "disabled";
+       };
+
        sata: sata@fc600000 {
                compatible = "renesas,rcar-sata";
                reg = <0xfc600000 0x2000>;
@@ -404,10 +440,10 @@
                /* Gate clocks */
                mstp0_clks: clocks@ffc80030 {
                        compatible = "renesas,r8a7779-mstp-clocks",
-                                    "renesas,cpg-mstp-clocks";
+                                    "renesas,cpg-mstp-clocks";
                        reg = <0xffc80030 4>;
                        clocks = <&cpg_clocks R8A7779_CLK_S>,
-                                <&cpg_clocks R8A7779_CLK_P>,
+                                <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_S>,
@@ -441,7 +477,7 @@
                };
                mstp1_clks: clocks@ffc80034 {
                        compatible = "renesas,r8a7779-mstp-clocks",
-                                    "renesas,cpg-mstp-clocks";
+                                    "renesas,cpg-mstp-clocks";
                        reg = <0xffc80034 4>, <0xffc80044 4>;
                        clocks = <&cpg_clocks R8A7779_CLK_P>,
                                 <&cpg_clocks R8A7779_CLK_P>,
@@ -470,7 +506,7 @@
                };
                mstp3_clks: clocks@ffc8003c {
                        compatible = "renesas,r8a7779-mstp-clocks",
-                                    "renesas,cpg-mstp-clocks";
+                                    "renesas,cpg-mstp-clocks";
                        reg = <0xffc8003c 4>;
                        clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>,
                                 <&s4_clk>, <&s4_clk>;