select PHYS_64BIT
select SYS_CACHE_SHIFT_6
-if ARM64
config POSITION_INDEPENDENT
bool "Generate position-independent pre-relocation code"
+ depends on ARM64 || CPU_V7A
help
U-Boot expects to be linked to a specific hard-coded address, and to
be loaded to and run from that address. This option lifts that
config INIT_SP_RELATIVE
bool "Specify the early stack pointer relative to the .bss section"
+ depends on ARM64
default n if ARCH_QEMU
default y if POSITION_INDEPENDENT
help
config SYS_INIT_SP_BSS_OFFSET
int "Early stack offset from the .bss base address"
+ depends on ARM64
depends on INIT_SP_RELATIVE
default 524288
help
do not overlap any appended DTB.
config LINUX_KERNEL_IMAGE_HEADER
+ depends on ARM64
bool
help
Place a Linux kernel image header at the start of the U-Boot binary.
image header reports the amount of memory (BSS and similar) that
U-Boot needs to use, but which isn't part of the binary.
-if LINUX_KERNEL_IMAGE_HEADER
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
+ depends on LINUX_KERNEL_IMAGE_HEADER
hex
help
The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
TEXT_OFFSET value written to the Linux kernel image header.
-endif
-endif
+
+config GICV2
+ bool
+
+config GICV3
+ bool
config GIC_V3_ITS
bool "ARM GICV3 ITS"
config SYS_ICACHE_OFF
bool "Do not enable icache"
- default n
help
Do not enable instruction cache in U-Boot.
config SYS_DCACHE_OFF
bool "Do not enable dcache"
- default n
help
Do not enable data cache in U-Boot.
default 4 if CPU_SA1100
default 8 if ARM64
-config SYS_CACHE_SHIFT_5
- bool
-
-config SYS_CACHE_SHIFT_6
- bool
-
-config SYS_CACHE_SHIFT_7
- bool
-
-config SYS_CACHELINE_SIZE
- int
- default 128 if SYS_CACHE_SHIFT_7
- default 64 if SYS_CACHE_SHIFT_6
- default 32 if SYS_CACHE_SHIFT_5
-
choice
prompt "Select the ARM data write cache policy"
default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
config ARM_CORTEX_CPU_IS_UP
bool
- default n
config USE_ARCH_MEMCPY
bool "Use an assembly optimized implementation of memcpy"
bool "TI Keystone"
select CMD_POWEROFF
select CPU_V7A
+ select DDR_SPD
select GPIO_EXTRA_HEADER
select SUPPORT_SPL
select SYS_ARCH_TIMER
select ARM64
select DM
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select OF_CONTROL
select ENABLE_ARM_SOC_BOOT0_HOOK
bool "NXP i.MX8M platform"
select ARM64
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
+ select SYS_I2C_MXC
select DM
select SUPPORT_SPL
imply CMD_DM
+config ARCH_IMX8ULP
+ bool "NXP i.MX8ULP platform"
+ select ARM64
+ select DM
+ select MACH_IMX
+ select OF_CONTROL
+ select SUPPORT_SPL
+ select GPIO_EXTRA_HEADER
+ imply CMD_DM
+
config ARCH_IMXRT
bool "NXP i.MXRT platform"
select CPU_V7M
select DM
select DM_SERIAL
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SUPPORT_SPL
imply CMD_DM
bool "NXP i.MX23 family"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select PL011_SERIAL
select SUPPORT_SPL
bool "NXP MX25"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
+ select MACH_IMX
imply MXC_GPIO
config ARCH_MX28
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
select PL011_SERIAL
+ select MACH_IMX
select SUPPORT_SPL
config ARCH_MX31
bool "NXP i.MX31 family"
select CPU_ARM1136
select GPIO_EXTRA_HEADER
+ select MACH_IMX
config ARCH_MX7ULP
bool "NXP MX7ULP"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select ARCH_MISC_INIT
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
bool "Freescale MX6"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select BOARD_EARLY_INIT_F
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
imply MXC_GPIO
config ARCH_NEXELL
select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select DM
select DM_SERIAL
+ select GICV2
select GPIO_EXTRA_HEADER
select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select OF_CONTROL
select SPL_NAND_SUPPORT if SPL_NAND_DENALI
select SPL_OF_CONTROL
select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
- select SPL_SERIAL_SUPPORT
+ select SPL_SERIAL
select SPL_SYSRESET
- select SPL_WATCHDOG_SUPPORT
+ select SPL_WATCHDOG
select SUPPORT_SPL
select SYS_NS16550
select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
imply SPL_DM_SPI
imply SPL_DM_SPI_FLASH
imply SPL_LIBDISK_SUPPORT
- imply SPL_MMC_SUPPORT
+ imply SPL_MMC
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
imply SPL_SPI_FLASH_SUPPORT
- imply SPL_SPI_SUPPORT
+ imply SPL_SPI
imply L2X0_CACHE
config ARCH_SUNXI
imply FIT
imply OF_LIBFDT_OVERLAY
imply PRE_CONSOLE_BUFFER
- imply SPL_GPIO_SUPPORT
+ imply SPL_GPIO
imply SPL_LIBCOMMON_SUPPORT
imply SPL_LIBGENERIC_SUPPORT
- imply SPL_MMC_SUPPORT if MMC
- imply SPL_POWER_SUPPORT
- imply SPL_SERIAL_SUPPORT
+ imply SPL_MMC if MMC
+ imply SPL_POWER
+ imply SPL_SERIAL
imply USB_GADGET
config ARCH_U8500
select DM_GPIO
select DM_MMC if MMC
select DM_SERIAL
+ select DM_USB_GADGET if DM_USB
select OF_CONTROL
select SYSRESET
select TIMER
+ imply AB8500_USB_PHY
imply ARM_PL180_MMCI
+ imply CLK
+ imply DM_PMIC
imply DM_RTC
+ imply NOMADIK_GPIO
imply NOMADIK_MTU_TIMER
+ imply PHY
imply PL01X_SERIAL
+ imply PMIC_AB8500
imply RTC_PL031
+ imply SYS_THUMB_BUILD
imply SYSRESET_SYSCON
config ARCH_VERSAL
select DM_ETH if NET
select DM_MMC if MMC
select DM_SERIAL
+ select GICV3
select GPIO_EXTRA_HEADER
select OF_CONTROL
+ select SOC_DEVICE
imply BOARD_LATE_INIT
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
bool "Freescale Vybrid"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
imply MTD_RAW_NAND
select DM_SPI if SPI
select DM_SPI_FLASH if DM_SPI
select FIRMWARE
+ select GICV2
select GPIO_EXTRA_HEADER
select OF_CONTROL
select SPL_BOARD_INIT if SPL
select SPL_SEPARATE_BSS if SPL
select SUPPORT_SPL
select ZYNQMP_IPI
+ select SOC_DEVICE
imply BOARD_LATE_INIT
imply CMD_DM
imply ENV_VARS_UBOOT_RUNTIME_CONFIG
config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
select BLK
- select BINMAN if SPL_OPTEE
+ select BINMAN if SPL_OPTEE || (SPL && !ARM64)
select DM
select DM_GPIO
select DM_I2C
config TARGET_PRESIDIO_ASIC
bool "Support Cortina Presidio ASIC Platform"
select ARM64
+ select GICV2
config TARGET_XENGUEST_ARM64
bool "Xen guest ARM64"
config TFABOOT
bool "Support for booting from TF-A"
depends on ARCH_SUPPORT_TFABOOT
- default n
help
Some platforms support the setup of secure registers (for instance
for CPU errata handling) or provide secure services like PSCI.
source "arch/arm/mach-imx/imx8m/Kconfig"
+source "arch/arm/mach-imx/imx8ulp/Kconfig"
+
source "arch/arm/mach-imx/imxrt/Kconfig"
source "arch/arm/mach-imx/mxs/Kconfig"