spi: Rename SPI_SUPPORT to SPI

[platform/kernel/u-boot.git] / arch / arm / Kconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c97acca..d49f26f 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -9,9 +9,9 @@ config ARM64
        select PHYS_64BIT
        select SYS_CACHE_SHIFT_6
 
-if ARM64
 config POSITION_INDEPENDENT
        bool "Generate position-independent pre-relocation code"
+       depends on ARM64 || CPU_V7A
        help
          U-Boot expects to be linked to a specific hard-coded address, and to
          be loaded to and run from that address. This option lifts that
@@ -22,6 +22,7 @@ config POSITION_INDEPENDENT
 
 config INIT_SP_RELATIVE
        bool "Specify the early stack pointer relative to the .bss section"
+       depends on ARM64
        default n if ARCH_QEMU
        default y if POSITION_INDEPENDENT
        help
@@ -37,6 +38,7 @@ config INIT_SP_RELATIVE
 
 config SYS_INIT_SP_BSS_OFFSET
        int "Early stack offset from the .bss base address"
+       depends on ARM64
        depends on INIT_SP_RELATIVE
        default 524288
        help
@@ -46,6 +48,7 @@ config SYS_INIT_SP_BSS_OFFSET
          do not overlap any appended DTB.
 
 config LINUX_KERNEL_IMAGE_HEADER
+       depends on ARM64
        bool
        help
          Place a Linux kernel image header at the start of the U-Boot binary.
@@ -54,14 +57,12 @@ config LINUX_KERNEL_IMAGE_HEADER
          image header reports the amount of memory (BSS and similar) that
          U-Boot needs to use, but which isn't part of the binary.
 
-if LINUX_KERNEL_IMAGE_HEADER
 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
+       depends on LINUX_KERNEL_IMAGE_HEADER
        hex
        help
          The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
          TEXT_OFFSET value written to the Linux kernel image header.
-endif
-endif
 
 config GICV2
        bool
@@ -110,7 +111,6 @@ config THUMB2_KERNEL
 
 config SYS_ICACHE_OFF
        bool "Do not enable icache"
-       default n
        help
          Do not enable instruction cache in U-Boot.
 
@@ -123,7 +123,6 @@ config SPL_SYS_ICACHE_OFF
 
 config SYS_DCACHE_OFF
        bool "Do not enable dcache"
-       default n
        help
          Do not enable data cache in U-Boot.
 
@@ -338,21 +337,6 @@ config SYS_ARM_ARCH
        default 4 if CPU_SA1100
        default 8 if ARM64
 
-config SYS_CACHE_SHIFT_5
-       bool
-
-config SYS_CACHE_SHIFT_6
-       bool
-
-config SYS_CACHE_SHIFT_7
-       bool
-
-config SYS_CACHELINE_SIZE
-       int
-       default 128 if SYS_CACHE_SHIFT_7
-       default 64 if SYS_CACHE_SHIFT_6
-       default 32 if SYS_CACHE_SHIFT_5
-
 choice
        prompt "Select the ARM data write cache policy"
        default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
@@ -458,7 +442,6 @@ config ENABLE_ARM_SOC_BOOT0_HOOK
 
 config ARM_CORTEX_CPU_IS_UP
        bool
-       default n
 
 config USE_ARCH_MEMCPY
        bool "Use an assembly optimized implementation of memcpy"
@@ -794,6 +777,7 @@ config ARCH_IMX8
        select ARM64
        select DM
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        select OF_CONTROL
        select ENABLE_ARM_SOC_BOOT0_HOOK
 
@@ -801,6 +785,7 @@ config ARCH_IMX8M
        bool "NXP i.MX8M platform"
        select ARM64
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        select SYS_FSL_HAS_SEC if IMX_HAB
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_LE
@@ -813,6 +798,7 @@ config ARCH_IMX8ULP
        bool "NXP i.MX8ULP platform"
        select ARM64
        select DM
+       select MACH_IMX
        select OF_CONTROL
        select SUPPORT_SPL
        select GPIO_EXTRA_HEADER
@@ -824,6 +810,7 @@ config ARCH_IMXRT
        select DM
        select DM_SERIAL
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        select SUPPORT_SPL
        imply CMD_DM
 
@@ -831,6 +818,7 @@ config ARCH_MX23
        bool "NXP i.MX23 family"
        select CPU_ARM926EJS
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        select PL011_SERIAL
        select SUPPORT_SPL
 
@@ -838,6 +826,7 @@ config ARCH_MX25
        bool "NXP MX25"
        select CPU_ARM926EJS
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        imply MXC_GPIO
 
 config ARCH_MX28
@@ -845,17 +834,20 @@ config ARCH_MX28
        select CPU_ARM926EJS
        select GPIO_EXTRA_HEADER
        select PL011_SERIAL
+       select MACH_IMX
        select SUPPORT_SPL
 
 config ARCH_MX31
        bool "NXP i.MX31 family"
        select CPU_ARM1136
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
 
 config ARCH_MX7ULP
        bool "NXP MX7ULP"
        select CPU_V7A
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        select SYS_FSL_HAS_SEC if IMX_HAB
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_LE
@@ -868,6 +860,7 @@ config ARCH_MX7
        select ARCH_MISC_INIT
        select CPU_V7A
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        select SYS_FSL_HAS_SEC if IMX_HAB
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_LE
@@ -879,6 +872,7 @@ config ARCH_MX6
        bool "Freescale MX6"
        select CPU_V7A
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_COMPAT_4
        select SYS_FSL_SEC_LE
@@ -895,6 +889,7 @@ config ARCH_MX5
        select BOARD_EARLY_INIT_F
        select CPU_V7A
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        imply MXC_GPIO
 
 config ARCH_NEXELL
@@ -971,7 +966,7 @@ config ARCH_SOCFPGA
        select SPL_NAND_SUPPORT if SPL_NAND_DENALI
        select SPL_OF_CONTROL
        select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
-       select SPL_SERIAL_SUPPORT
+       select SPL_SERIAL
        select SPL_SYSRESET
        select SPL_WATCHDOG
        select SUPPORT_SPL
@@ -991,11 +986,11 @@ config ARCH_SOCFPGA
        imply SPL_DM_SPI
        imply SPL_DM_SPI_FLASH
        imply SPL_LIBDISK_SUPPORT
-       imply SPL_MMC_SUPPORT
+       imply SPL_MMC
        imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
        imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
        imply SPL_SPI_FLASH_SUPPORT
-       imply SPL_SPI_SUPPORT
+       imply SPL_SPI
        imply L2X0_CACHE
 
 config ARCH_SUNXI
@@ -1041,9 +1036,9 @@ config ARCH_SUNXI
        imply SPL_GPIO
        imply SPL_LIBCOMMON_SUPPORT
        imply SPL_LIBGENERIC_SUPPORT
-       imply SPL_MMC_SUPPORT if MMC
+       imply SPL_MMC if MMC
        imply SPL_POWER
-       imply SPL_SERIAL_SUPPORT
+       imply SPL_SERIAL
        imply USB_GADGET
 
 config ARCH_U8500
@@ -1053,14 +1048,22 @@ config ARCH_U8500
        select DM_GPIO
        select DM_MMC if MMC
        select DM_SERIAL
+       select DM_USB_GADGET if DM_USB
        select OF_CONTROL
        select SYSRESET
        select TIMER
+       imply AB8500_USB_PHY
        imply ARM_PL180_MMCI
+       imply CLK
+       imply DM_PMIC
        imply DM_RTC
+       imply NOMADIK_GPIO
        imply NOMADIK_MTU_TIMER
+       imply PHY
        imply PL01X_SERIAL
+       imply PMIC_AB8500
        imply RTC_PL031
+       imply SYS_THUMB_BUILD
        imply SYSRESET_SYSCON
 
 config ARCH_VERSAL
@@ -1082,6 +1085,7 @@ config ARCH_VF610
        bool "Freescale Vybrid"
        select CPU_V7A
        select GPIO_EXTRA_HEADER
+       select MACH_IMX
        select SYS_FSL_ERRATUM_ESDHC111
        imply CMD_MTDPARTS
        imply MTD_RAW_NAND
@@ -1909,7 +1913,6 @@ config ARCH_SUPPORT_TFABOOT
 config TFABOOT
        bool "Support for booting from TF-A"
        depends on ARCH_SUPPORT_TFABOOT
-       default n
        help
          Some platforms support the setup of secure registers (for instance
          for CPU errata handling) or provide secure services like PSCI.