endif
endif
+config GICV2
+ bool
+
+config GICV3
+ bool
+
config GIC_V3_ITS
bool "ARM GICV3 ITS"
select REGMAP
default 4 if CPU_SA1100
default 8 if ARM64
-config SYS_CACHE_SHIFT_5
- bool
-
-config SYS_CACHE_SHIFT_6
- bool
-
-config SYS_CACHE_SHIFT_7
- bool
-
-config SYS_CACHELINE_SIZE
- int
- default 128 if SYS_CACHE_SHIFT_7
- default 64 if SYS_CACHE_SHIFT_6
- default 32 if SYS_CACHE_SHIFT_5
-
choice
prompt "Select the ARM data write cache policy"
default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
bool "TI Keystone"
select CMD_POWEROFF
select CPU_V7A
+ select DDR_SPD
select GPIO_EXTRA_HEADER
select SUPPORT_SPL
select SYS_ARCH_TIMER
select ARM64
select DM
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select OF_CONTROL
select ENABLE_ARM_SOC_BOOT0_HOOK
bool "NXP i.MX8M platform"
select ARM64
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
+ select SYS_I2C_MXC
select DM
select SUPPORT_SPL
imply CMD_DM
bool "NXP i.MX8ULP platform"
select ARM64
select DM
+ select MACH_IMX
select OF_CONTROL
select SUPPORT_SPL
select GPIO_EXTRA_HEADER
select DM
select DM_SERIAL
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SUPPORT_SPL
imply CMD_DM
bool "NXP i.MX23 family"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select PL011_SERIAL
select SUPPORT_SPL
bool "NXP MX25"
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
+ select MACH_IMX
imply MXC_GPIO
config ARCH_MX28
select CPU_ARM926EJS
select GPIO_EXTRA_HEADER
select PL011_SERIAL
+ select MACH_IMX
select SUPPORT_SPL
config ARCH_MX31
bool "NXP i.MX31 family"
select CPU_ARM1136
select GPIO_EXTRA_HEADER
+ select MACH_IMX
config ARCH_MX7ULP
bool "NXP MX7ULP"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select ARCH_MISC_INIT
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
bool "Freescale MX6"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select BOARD_EARLY_INIT_F
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
imply MXC_GPIO
config ARCH_NEXELL
select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select DM
select DM_SERIAL
+ select GICV2
select GPIO_EXTRA_HEADER
select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select OF_CONTROL
select DM_ETH if NET
select DM_MMC if MMC
select DM_SERIAL
+ select GICV3
select GPIO_EXTRA_HEADER
select OF_CONTROL
select SOC_DEVICE
bool "Freescale Vybrid"
select CPU_V7A
select GPIO_EXTRA_HEADER
+ select MACH_IMX
select SYS_FSL_ERRATUM_ESDHC111
imply CMD_MTDPARTS
imply MTD_RAW_NAND
select DM_SPI if SPI
select DM_SPI_FLASH if DM_SPI
select FIRMWARE
+ select GICV2
select GPIO_EXTRA_HEADER
select OF_CONTROL
select SPL_BOARD_INIT if SPL
config TARGET_PRESIDIO_ASIC
bool "Support Cortina Presidio ASIC Platform"
select ARM64
+ select GICV2
config TARGET_XENGUEST_ARM64
bool "Xen guest ARM64"