imply DM_SPI
imply DM_SPI_FLASH
imply FAT_WRITE
+ imply SPL
+ imply SPL_DM
imply SPL_LIBDISK_SUPPORT
imply SPL_MMC_SUPPORT
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
select DM_GPIO
select DM_KEYBOARD
select DM_MMC if MMC
+ select DM_SCSI if SCSI
select DM_SERIAL
select DM_USB if DISTRO_DEFAULTS
select OF_BOARD_SETUP
select ARCH_MISC_INIT
select ARM64
select ARMV8_MULTIENTRY
+ select FSL_DDR_SYNC_REFRESH
help
Support for Freescale LS2080A_EMU platform
The LS2080A Development System (EMULATOR) is a pre silicon
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
select SUPPORT_SPL
+ select FSL_DDR_INTERACTIVE if !SD_BOOT
help
Support for NXP LS1088AQDS platform
The LS1088A Development System (QDS) is a high-performance
select SUPPORT_SPL
imply SCSI
imply SCSI_AHCI
+ select FSL_DDR_BIST
+ select FSL_DDR_INTERACTIVE if !SPL
help
Support for Freescale LS2080AQDS platform
The LS2080A Development System (QDS) is a high-performance
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
select SUPPORT_SPL
+ select FSL_DDR_BIST
+ select FSL_DDR_INTERACTIVE if !SPL
imply SCSI
imply SCSI_AHCI
help
is a high-performance development platform that supports the
QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
+config TARGET_LX2160AQDS
+ bool "Support lx2160aqds"
+ select ARCH_LX2160A
+ select ARCH_MISC_INIT
+ select ARM64
+ select ARMV8_MULTIENTRY
+ select BOARD_LATE_INIT
+ help
+ Support for NXP LX2160AQDS platform.
+ The lx2160aqds (LX2160A QorIQ Development System (QDS)
+ is a high-performance development platform that supports the
+ QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
+
config TARGET_HIKEY
bool "Support HiKey 96boards Consumer Edition Platform"
select ARM64
select ARMV8_MULTIENTRY
select BOARD_LATE_INIT
select SUPPORT_SPL
+ select FSL_DDR_INTERACTIVE if !SD_BOOT
help
Support for NXP LS1088ARDB platform.
The LS1088A Reference design board (RDB) is a high-performance
select LS1_DEEP_SLEEP
select SUPPORT_SPL
select SYS_FSL_DDR
+ select FSL_DDR_INTERACTIVE
imply SCSI
config TARGET_LS1021ATWR
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
select SUPPORT_SPL
+ select FSL_DDR_INTERACTIVE if !SPL
imply SCSI
+ imply SCSI_AHCI
help
Support for Freescale LS1043AQDS platform.
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
select SUPPORT_SPL
- imply SCSI
help
Support for Freescale LS1043ARDB platform.
select BOARD_LATE_INIT
select DM_SPI_FLASH if DM_SPI
select SUPPORT_SPL
+ select FSL_DDR_BIST if !SPL
+ select FSL_DDR_INTERACTIVE if !SPL
+ select FSL_DDR_INTERACTIVE if !SPL
imply SCSI
help
Support for Freescale LS1046AQDS platform.
select DM_SPI_FLASH if DM_SPI
select POWER_MC34VR500
select SUPPORT_SPL
+ select FSL_DDR_BIST
+ select FSL_DDR_INTERACTIVE if !SPL
imply SCSI
help
Support for Freescale LS1046ARDB platform.
select SYSRESET
select SYS_THUMB_BUILD
imply CMD_DM
+ imply CMD_POWEROFF
+ imply ENV_VARS_UBOOT_RUNTIME_CONFIG
help
Support for STM32MP SoC family developed by STMicroelectronics,
MPUs based on ARM cortex A core
- U-BOOT is running in DDR and SPL support is the unsecure First Stage
- BootLoader (FSBL)
+ U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
+ FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
+ chain.
+ SPL is the unsecure FSBL for the basic boot chain.
config ARCH_ROCKCHIP
bool "Support Rockchip SoCs"
config TI_SECURE_DEVICE
bool "HS Device Type Support"
- depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
+ depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
help
If a high secure (HS) device type is being used, this config
must be set. This option impacts various aspects of the
authenticated) and the code. See the doc/README.ti-secure
file for further details.
+if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
+config ISW_ENTRY_ADDR
+ hex "Address in memory or XIP address of bootloader entry point"
+ default 0x402F4000 if AM43XX
+ default 0x402F0400 if AM33XX
+ default 0x40301350 if OMAP54XX
+ help
+ After any reset, the boot ROM searches the boot media for a valid
+ boot image. For non-XIP devices, the ROM then copies the image into
+ internal memory. For all boot modes, after the ROM processes the
+ boot image it eventually computes the entry point address depending
+ on the device type (secure/non-secure), boot media (xip/non-xip) and
+ image headers.
+endif
+
source "arch/arm/mach-aspeed/Kconfig"
source "arch/arm/mach-at91/Kconfig"
source "arch/arm/mach-imx/Kconfig"
source "board/bosch/shc/Kconfig"
+source "board/bosch/guardian/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/gplugd/Kconfig"