spl: Use SPL_TEXT_BASE instead of ISW_ENTRY_ADDR

[platform/kernel/u-boot.git] / arch / Kconfig

diff --git a/arch/Kconfig b/arch/Kconfig
index b396263..6495e78 100644 (file)
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -8,9 +8,6 @@ config CREATE_ARCH_SYMLINK
 config HAVE_ARCH_IOREMAP
        bool
 
-config NEEDS_MANUAL_RELOC
-       bool
-
 config SYS_CACHE_SHIFT_4
        bool
 
@@ -76,9 +73,12 @@ config M68K
 
 config MICROBLAZE
        bool "MicroBlaze architecture"
-       select NEEDS_MANUAL_RELOC
        select SUPPORT_OF_CONTROL
-       imply CMD_IRQ
+       imply CMD_TIMER
+       imply SPL_REGMAP if SPL
+       imply SPL_TIMER if SPL
+       imply TIMER
+       imply XILINX_TIMER
 
 config MIPS
        bool "MIPS architecture"
@@ -135,6 +135,7 @@ config SANDBOX
        select BZIP2
        select CMD_POWEROFF
        select DM
+       select DM_FUZZING_ENGINE
        select DM_GPIO
        select DM_I2C
        select DM_KEYBOARD
@@ -170,6 +171,7 @@ config SANDBOX
        imply CRC32_VERIFY
        imply FAT_WRITE
        imply FIRMWARE
+       imply FUZZING_ENGINE_SANDBOX
        imply HASH_VERIFY
        imply LZMA
        imply TEE
@@ -449,4 +451,32 @@ source "arch/x86/Kconfig"
 source "arch/xtensa/Kconfig"
 source "arch/riscv/Kconfig"
 
+if ARM || M68K || PPC
+
+source "arch/Kconfig.nxp"
+
+endif
+
 source "board/keymile/Kconfig"
+
+if MIPS || MICROBLAZE
+
+choice
+       prompt "Endianness selection"
+       help
+         Some MIPS boards can be configured for either little or big endian
+         byte order. These modes require different U-Boot images. In general there
+         is one preferred byteorder for a particular system but some systems are
+         just as commonly used in the one or the other endianness.
+
+config SYS_BIG_ENDIAN
+       bool "Big endian"
+       depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE
+
+config SYS_LITTLE_ENDIAN
+       bool "Little endian"
+       depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE
+
+endchoice
+
+endif