/m68k Files generic to m68k architecture
/microblaze Files generic to microblaze architecture
/mips Files generic to MIPS architecture
- /nds32 Files generic to NDS32 architecture
/nios2 Files generic to Altera NIOS2 architecture
/powerpc Files generic to PowerPC architecture
/riscv Files generic to RISC-V architecture
SPL-specific notes:
- stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
- CONFIG_SPL_STACK_R_ADDR points into SDRAM
- - preloader_console_init() can be called here - typically this is
- done by selecting CONFIG_SPL_BOARD_INIT and then supplying a
- spl_board_init() function containing this call
- - loads U-Boot or (in falcon mode) Linux
-
-
-Configuration Options:
-----------------------
-
-Configuration depends on the combination of board and CPU type; all
-such information is kept in a configuration file
-"include/configs/<board_name>.h".
-
-Example: For a TQM823L module, all configuration settings are in
-"include/configs/TQM823L.h".
-
-
-Many of the options are named exactly as the corresponding Linux
-kernel configuration options. The intention is to make it easier to
-build a config tool - later.
-
-- ARM Platform Bus Type(CCI):
- CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
- provides full cache coherency between two clusters of multi-core
- CPUs and I/O coherency for devices and I/O masters
-
CONFIG_SYS_FSL_HAS_CCI400
Defined For SoC that has cache coherent interconnect
See Freescale App Note 4493 for more information about
this erratum.
- CONFIG_A003399_NOR_WORKAROUND
- Enables a workaround for IFC erratum A003399. It is only
- required during NOR boot.
-
- CONFIG_A008044_WORKAROUND
- Enables a workaround for T1040/T1042 erratum A008044. It is only
- required during NAND boot and valid for Rev 1.0 SoC revision
-
CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
This is the value to write into CCSR offset 0x18600
In this mode, a single differential clock is used to supply
clocks to the sysclock, ddrclock and usbclock.
- CONFIG_SYS_CPC_REINIT_F
- This CONFIG is defined when the CPC is configured as SRAM at the
- time of U-Boot entry and is required to be re-initialized.
-
- CONFIG_DEEP_SLEEP
- Indicates this SoC supports deep sleep feature. If deep sleep is
- supported, core will start to execute uboot when wakes up.
-
- Generic CPU options:
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
CONFIG_SYS_FSL_DDR_ADDR
Freescale DDR memory-mapped register base.
- CONFIG_SYS_FSL_DDR_EMU
- Specify emulator support for DDR. Some DDR features such as
- deskew training are not available.
-
CONFIG_SYS_FSL_DDRC_GEN1
Freescale DDR1 controller.
CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
Number of controllers used for other than main memory.
- CONFIG_SYS_FSL_HAS_DP_DDR
- Defines the SoC has DP-DDR used for DPAA.
-
CONFIG_SYS_FSL_SEC_BE
Defines the SEC controller register space as Big Endian
Defines the SEC controller register space as Little Endian
- MIPS CPU options:
- CONFIG_SYS_INIT_SP_OFFSET
-
- Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
- pointer. This is needed for the temporary stack before
- relocation.
-
CONFIG_XWAY_SWAP_BYTES
Enable compilation of tools/xway-swap-bytes needed for Lantiq
boards with QUICC Engines require OF_QE to set UCC MAC
addresses
- CONFIG_OF_SYSTEM_SETUP
-
- Other code has addition modification that it wants to make
- to the flat device tree before handing it off to the kernel.
- This causes ft_system_setup() to be called before booting
- the kernel.
-
CONFIG_OF_IDE_FIXUP
U-Boot can detect if an IDE device is present or not.
CONFIG_SCSI) you must configure support for at
least one non-MTD partition type as well.
-- LBA48 Support
- CONFIG_LBA48
-
- Set this to enable support for disks larger than 137GB
- Also look at CONFIG_SYS_64BIT_LBA.
- Whithout these , LBA48 support uses 32bit variables and will 'only'
- support disks up to 2.1TB.
-
- CONFIG_SYS_64BIT_LBA:
- When enabled, makes the IDE subsystem use 64bit sector addresses.
- Default is 32bit.
-
-- SCSI Support:
- CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
- CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
- CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
- maximum numbers of LUNs, SCSI ID's and target
- devices.
-
- The environment variable 'scsidevs' is set to the number of
- SCSI devices found during the last scan.
-
- NETWORK Support (PCI):
CONFIG_E1000_SPI
Utility code for direct access to the SPI bus on Intel 8257x.
Supported are USB Keyboards and USB Floppy drives
(TEAC FD-05PUB).
- CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
- txfilltuning field in the EHCI controller on reset.
-
CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
HW module registers.
the appropriate value in Hz.
- MMC Support:
- The MMC controller on the Intel PXA is supported. To
- enable this define CONFIG_MMC. The MMC can be
- accessed from the boot prompt by mapping the device
- to physical memory similar to flash. Command line is
- enabled with CONFIG_CMD_MMC. The MMC driver also works with
- the FAT fs. This is enabled with CONFIG_CMD_FAT.
-
CONFIG_SH_MMCIF
Support for Renesas on-chip MMCIF controller
- Keyboard Support:
See Kconfig help for available keyboard drivers.
-- Video support:
- CONFIG_FSL_DIU_FB
- Enable the Freescale DIU video driver. Reference boards for
- SOCs that have a DIU should define this macro to enable DIU
- support, and should also define these other macros:
-
- CONFIG_SYS_DIU_ADDR
- CONFIG_VIDEO
- CONFIG_CFB_CONSOLE
- CONFIG_VIDEO_SW_CURSOR
- CONFIG_VGA_AS_SINGLE_DEVICE
- CONFIG_VIDEO_BMP_LOGO
-
- The DIU driver will look for the 'video-mode' environment
- variable, and if defined, enable the DIU as a console during
- boot. See the documentation file doc/README.video for a
- description of this variable.
-
- LCD Support: CONFIG_LCD
Define this to enable LCD support (for output to LCD
display); also select one of the supported displays
by defining one of these:
- CONFIG_ATMEL_LCD:
-
- HITACHI TX09D70VM1CCA, 3.5", 240x320.
-
CONFIG_NEC_NL6448AC33:
NEC NL6448AC33-18. Active, color, single scan.
If CONFIG_LCD_ROTATION is not defined, the console will be
initialized with 0degree rotation.
- CONFIG_LCD_BMP_RLE8
-
- Support drawing of RLE8-compressed bitmaps on the LCD.
-
- MII/PHY support:
CONFIG_PHY_CLOCK_FREQ (ppc4xx)
The clock frequency of the MII bus
- CONFIG_PHY_RESET_DELAY
-
- Some PHY like Intel LXT971A need extra delay after
- reset before any MII register access is possible.
- For such PHY, set this option to the usec delay
- required. (minimum 300usec for LXT971A)
-
CONFIG_PHY_CMD_DELAY (ppc4xx)
Some PHY like Intel LXT971A need extra delay after
from a BOOTP client in networks with unusually high latency.
- DHCP Advanced Options:
- You can fine tune the DHCP functionality by defining
- CONFIG_BOOTP_* symbols:
-
- CONFIG_BOOTP_NISDOMAIN
- CONFIG_BOOTP_BOOTFILESIZE
- CONFIG_BOOTP_NTPSERVER
- CONFIG_BOOTP_TIMEOFFSET
- CONFIG_BOOTP_VENDOREX
- CONFIG_BOOTP_MAY_FAIL
-
- CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
- after the configured retry count, the call will fail
- instead of starting over. This can be used to fail over
- to Link-local IP address configuration if the DHCP server
- is not available.
-
- CONFIG_BOOTP_DHCP_REQUEST_DELAY
-
- A 32bit value in microseconds for a delay between
- receiving a "DHCP Offer" and sending the "DHCP Request".
- This fixes a problem with certain DHCP servers that don't
- respond 100% of the time to a "DHCP request". E.g. On an
- AT91RM9200 processor running at 180MHz, this delay needed
- to be *at least* 15,000 usec before a Windows Server 2003
- DHCP server would reply 100% of the time. I recommend at
- least 50,000 usec to be safe. The alternative is to hope
- that one of the retries will be successful but note that
- the DHCP timeout and retry process takes a longer than
- this delay.
- Link-local IP address negotiation:
Negotiate with other link-local clients on the local network
will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
- CONFIG_SYS_SPD_BUS_NUM
-
- If defined, then this indicates the I2C bus number for DDR SPD.
- If not defined, then U-Boot assumes that SPD is on I2C bus 0.
-
CONFIG_SYS_RTC_BUS_NUM
If defined, then this indicates the I2C bus number for the RTC.
Enables support for FPGA family.
(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
- CONFIG_FPGA_COUNT
-
- Specify the number of FPGA devices to support.
-
CONFIG_SYS_FPGA_PROG_FEEDBACK
Enable printing of hash marks during FPGA configuration.
FLAGADM
- Error Recovery:
- CONFIG_NET_RETRY_COUNT
-
- This variable defines the number of retries for
- network operations like ARP, RARP, TFTP, or BOOTP
- before giving up the operation. If not defined, a
- default value of 5 is used.
-
- CONFIG_ARP_TIMEOUT
-
- Timeout waiting for an ARP reply in milliseconds.
-
- CONFIG_NFS_TIMEOUT
-
- Timeout in milliseconds used in NFS protocol.
- If you encounter "ERROR: Cannot umount" in nfs command,
- try longer timeout such as
- #define CONFIG_NFS_TIMEOUT 10000UL
-
Note:
In the current implementation, the local variables
of the backslashes before semicolons and special
symbols.
-- Command Line Editing and History:
- CONFIG_CMDLINE_PS_SUPPORT
-
- Enable support for changing the command prompt string
- at run-time. Only static string is supported so far.
- The string is obtained from environment variables PS1
- and PS2.
-
- Default Environment:
CONFIG_EXTRA_ENV_SETTINGS
this is instead controlled by the value of
/config/load-environment.
-- TFTP Fixed UDP Port:
- CONFIG_TFTP_PORT
-
- If this is defined, the environment variable tftpsrcp
- is used to supply the TFTP UDP source port value.
- If tftpsrcp isn't defined, the normal pseudo-random port
- number generator is used.
-
- Also, the environment variable tftpdstp is used to supply
- the TFTP UDP destination port value. If tftpdstp isn't
- defined, the normal port 69 is used.
-
- The purpose for tftpsrcp is to allow a TFTP server to
- blindly start the TFTP transfer using the pre-configured
- target IP address and UDP port. This has the effect of
- "punching through" the (Windows XP) firewall, allowing
- the remainder of the TFTP transfer to proceed normally.
- A better solution is to properly configure the firewall,
- but sometimes that is not allowed.
-
CONFIG_STANDALONE_LOAD_ADDR
This option defines a board specific value for the
overwriting the architecture dependent default
settings.
-- Frame Buffer Address:
- CONFIG_FB_ADDR
-
- Define CONFIG_FB_ADDR if you want to use specific
- address for frame buffer. This is typically the case
- when using a graphics controller has separate video
- memory. U-Boot will then place the frame buffer at
- the given address instead of dynamically reserving it
- in system RAM by calling lcd_setmem(), which grabs
- the memory for the frame buffer depending on the
- configured panel size.
-
- Please see board_init_f function.
-
- Automatic software updates via TFTP server
CONFIG_UPDATE_TFTP
CONFIG_UPDATE_TFTP_CNT_MAX
CONFIG_SPL
Enable building of SPL globally.
- CONFIG_SPL_MAX_FOOTPRINT
- Maximum size in memory allocated to the SPL, BSS included.
- When defined, the linker checks that the actual memory
- used by SPL from _start to __bss_end does not exceed it.
- CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
- must not be both defined at the same time.
-
- CONFIG_SPL_MAX_SIZE
- Maximum size of the SPL image (text, data, rodata, and
- linker lists sections), BSS excluded.
- When defined, the linker checks that the actual size does
- not exceed it.
-
- CONFIG_SPL_RELOC_TEXT_BASE
- Address to relocate to. If unspecified, this is equal to
- CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
-
- CONFIG_SPL_BSS_START_ADDR
- Link address for the BSS within the SPL binary.
-
- CONFIG_SPL_BSS_MAX_SIZE
- Maximum size in memory allocated to the SPL BSS.
- When defined, the linker checks that the actual memory used
- by SPL from __bss_start to __bss_end does not exceed it.
- CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
- must not be both defined at the same time.
-
- CONFIG_SPL_STACK
- Adress of the start of the stack SPL will use
-
CONFIG_SPL_PANIC_ON_RAW_IMAGE
When defined, SPL will panic() if the image it has
loaded does not have a signature.
consider that a completely unreadable NAND block is bad,
and thus should be skipped silently.
- CONFIG_SPL_RELOC_STACK
- Adress of the start of the stack SPL will use after
- relocation. If unspecified, this is equal to
- CONFIG_SPL_STACK.
-
- CONFIG_SYS_SPL_MALLOC_START
- Starting address of the malloc pool used in SPL.
- When this option is set the full malloc is used in SPL and
- it is set up by spl_init() and before that, the simple malloc()
- can be used if CONFIG_SYS_MALLOC_F is defined.
-
- CONFIG_SYS_SPL_MALLOC_SIZE
- The size of the malloc pool used in SPL.
-
CONFIG_SPL_DISPLAY_PRINT
For ARM, enable an optional function to print more information
about the running system.
- CONFIG_SPL_INIT_MINIMAL
- Arch init code should be built for a very small image
-
- CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
- CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
- Sector and number of sectors to load kernel argument
- parameters from when MMC is being used in raw mode
- (for falcon mode)
-
- CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
- Filename to read to load U-Boot when reading from filesystem
-
- CONFIG_SPL_FS_LOAD_KERNEL_NAME
- Filename to read to load kernel uImage when reading
- from filesystem (for Falcon mode)
-
- CONFIG_SPL_FS_LOAD_ARGS_NAME
- Filename to read to load kernel argument parameters
- when reading from filesystem (for Falcon mode)
-
CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
Set this for NAND SPL on PPC mpc83xx targets, so that
start.S waits for the rest of the SPL to load before
continuing (the hardware starts execution after just
loading the first page rather than the full 4K).
- CONFIG_SPL_SKIP_RELOCATE
- Avoid SPL relocation
-
- CONFIG_SPL_NAND_IDENT
- SPL uses the chip ID list to identify the NAND flash.
- Requires CONFIG_SPL_NAND_BASE.
-
CONFIG_SPL_UBI
Support for a lightweight UBI (fastmap) scanner and
loader
- CONFIG_SPL_NAND_RAW_ONLY
- Support to boot only raw u-boot.bin images. Use this only
- if you need to save space.
-
- CONFIG_SPL_COMMON_INIT_DDR
- Set for common ddr init with serial presence detect in
- SPL binary.
-
CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
CONFIG_SPL_RAM_DEVICE
Support for running image already present in ram, in SPL binary
- CONFIG_SPL_PAD_TO
- Image offset to which the SPL should be padded before appending
- the SPL payload. By default, this is defined as
- CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
- CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
- payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
-
- CONFIG_SPL_TARGET
- Final target image containing SPL and payload. Some SPLs
- use an arch-specific makefile fragment instead, for
- example if more than one image needs to be produced.
-
CONFIG_SPL_FIT_PRINT
Printing information about a FIT image adds quite a bit of
code to SPL. So this is normally disabled in SPL. Use this
option to re-enable it. This will affect the output of the
bootm command when booting a FIT image.
-- TPL framework
- CONFIG_TPL
- Enable building of TPL globally.
-
- CONFIG_TPL_PAD_TO
- Image offset to which the TPL should be padded before appending
- the TPL payload. By default, this is defined as
- CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
- CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
- payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
-
- Interrupt support (PPC):
There are common interrupt_init() and timer_interrupt()
- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
- CONFIG_BOARD_LATE_INIT: Call board_late_init()
-- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
Configuration Settings:
-----------------------
- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
prompt for user input.
-- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
-
-- CONFIG_SYS_PBSIZE: Buffer size for Console output
-
-- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
-
-- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
- the application (usually a Linux kernel) when it is
- booted
-
- CONFIG_SYS_BAUDRATE_TABLE:
List of legal baudrate settings for this board.
the RAM base is not zero, or RAM is divided into banks,
this variable needs to be recalcuated to get the address.
-- CONFIG_SYS_MEM_TOP_HIDE:
- If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
- this specified memory area will get subtracted from the top
- (end) of RAM and won't get "touched" at all by U-Boot. By
- fixing up gd->ram_size the Linux kernel should gets passed
- the now "corrected" memory size and won't touch it either.
- This should work for arch/ppc and arch/powerpc. Only Linux
- board ports in arch/powerpc with bootwrapper support that
- recalculate the memory size from the SDRAM controller setup
- will have to get fixed in Linux additionally.
-
- This option can be used as a workaround for the 440EPx/GRx
- CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
- be touched.
-
- WARNING: Please make sure that this value is a multiple of
- the Linux page size (normally 4k). If this is not the case,
- then the end address of the Linux memory will be located at a
- non page size aligned address and this could cause major
- problems.
-
- CONFIG_SYS_LOADS_BAUD_CHANGE:
Enable temporary baudrate change while serial download
- CONFIG_SYS_FLASH_BASE:
Physical start address of Flash memory.
-- CONFIG_SYS_MONITOR_BASE:
- Physical start address of boot monitor code (set by
- make config files to be same as the text base address
- (CONFIG_SYS_TEXT_BASE) used when linking) - same as
- CONFIG_SYS_FLASH_BASE when booting from flash.
-
- CONFIG_SYS_MONITOR_LEN:
Size of memory reserved for monitor code, used to
determine _at_compile_time_ (!) if the environment is
- CONFIG_SYS_MALLOC_SIMPLE
Provides a simple and small malloc() and calloc() for those
boards which do not use the full malloc in SPL (which is
- enabled with CONFIG_SYS_SPL_MALLOC_START).
+ enabled with CONFIG_SYS_SPL_MALLOC).
- CONFIG_SYS_NONCACHED_MEMORY:
Size of non-cached memory area. This area of memory will be
Non-cached memory is only supported on 32-bit ARM at present.
-- CONFIG_SYS_BOOTM_LEN:
- Normally compressed uImages are limited to an
- uncompressed size of 8 MBytes. If this is not enough,
- you can define CONFIG_SYS_BOOTM_LEN in your board config file
- to adjust this setting to your needs.
-
- CONFIG_SYS_BOOTMAPSZ:
Maximum size of memory mapped by the startup code of
the Linux kernel; all data that must be processed by
CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
then the value in "bootm_size" will be used instead.
-- CONFIG_SYS_BOOT_RAMDISK_HIGH:
- Enable initrd_high functionality. If defined then the
- initrd_high feature is enabled and the bootm ramdisk subcommand
- is enabled.
-
- CONFIG_SYS_BOOT_GET_CMDLINE:
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
while unprotecting/erasing/programming. Please only enable
this option if you really know what you are doing.
-- CONFIG_SYS_RX_ETH_BUFFER:
- Defines the number of Ethernet receive buffers. On some
- Ethernet controllers it is recommended to set this value
- to 8 or even higher (EEPRO100 or 405 EMAC), since all
- buffers can be full shortly after enabling the interface
- on high Ethernet traffic.
- Defaults to 4 if not defined.
-
-- CONFIG_ENV_MAX_ENTRIES
-
- Maximum number of entries in the hash table that is used
- internally to store the environment settings. The default
- setting is supposed to be generous and should work in most
- cases. This setting can be used to tune behaviour; see
- lib/hashtable.c for details.
-
- CONFIG_ENV_FLAGS_LIST_DEFAULT
- CONFIG_ENV_FLAGS_LIST_STATIC
Enable validation of the values given to environment variables when
the default environment is used; a new CRC is computed as soon as you
use the "saveenv" command to store a valid environment.
-- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
- Echo the inverted Ethernet link state to the fault LED.
-
- Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
- also needs to be defined.
-
- CONFIG_SYS_FAULT_MII_ADDR:
MII address of the PHY to check for the Ethernet link state.
later, once stdio is running and output goes to the LCD, if
present.
-- CONFIG_BOARD_SIZE_LIMIT:
- Maximum size of the U-Boot image. When defined, the
- build system checks that the actual size does not
- exceed it.
-
Low Level (hardware related) configuration options:
---------------------------------------------------
used in assembly code, so it must not contain typecasts or
integer size suffixes (e.g. "ULL").
-- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
- If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
- forced to a value that ensures that CCSR is not relocated.
-
- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
DO NOT CHANGE unless you know exactly what you're
doing! (11-4) [MPC8xx systems only]
U-Boot uses the following memory types:
- MPC8xx: IMMR (internal memory of the CPU)
-- CONFIG_SYS_GBL_DATA_OFFSET:
-
- Offset of the initial data structure in the memory
- area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
- CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
- data is located at the end of the available space
- (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
- GENERATED_GBL_DATA_SIZE), and the initial stack is just
- below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
- CONFIG_SYS_GBL_DATA_OFFSET) downward.
-
- Note:
- On the MPC824X (or other systems that use the data
- cache for initial memory) the address chosen for
- CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
- point to an otherwise UNUSED address space between
- the top of RAM and the start of the PCI space.
-
- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
- CONFIG_SYS_OR_TIMING_SDRAM:
one, specify here. Note that the value must resolve
to something your driver can deal with.
-- CONFIG_SYS_DDR_RAW_TIMING
- Get DDR timing information from other than SPD. Common with
- soldered DDR chips onboard without SPD. DDR raw timing
- parameters are extracted from datasheet and hard-coded into
- header files or board specific files.
-
- CONFIG_FSL_DDR_INTERACTIVE
Enable interactive DDR debugging. See doc/README.fsl-ddr.
- CONFIG_FSL_DDR_BIST
Enable built-in memory test for Freescale DDR controllers.
-- CONFIG_SYS_83XX_DDR_USES_CS0
- Only for 83xx systems. If specified, then DDR should
- be configured using CS0 and CS1 instead of CS2 and CS3.
-
- CONFIG_RMII
Enable RMII mode for all FECs.
Note that this is a global option, we can't
proper). Code that needs stage-specific behavior should check
this.
-- CONFIG_SYS_MPC85XX_NO_RESETVEC
- Only for 85xx systems. If this variable is specified, the section
- .resetvec is not kept and the section .bootpg is placed in the
- previous 4k of the .text section.
-
- CONFIG_ARCH_MAP_SYSMEM
Generally U-Boot (and in particular the md command) uses
effective address. It is therefore not necessary to regard
diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
loads - load S-Record file over serial line
loadb - load binary file over serial line (kermit mode)
+loadm - load binary blob from source address to destination address
md - memory display
mm - memory modify (auto-incrementing)
nm - memory modify (constant address)
LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).
* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
- IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
- Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
+ IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
+ Currently supported: ARM, Intel x86, MIPS, Nios II, PowerPC).
* Compression Type (uncompressed, gzip, bzip2)
* Load Address
* Entry Point
Note: on Nios II, we give "-G0" option to gcc and don't use gp
to access small data sections, so gp is free.
-On NDS32, the following registers are used:
-
- R0-R1: argument/return
- R2-R5: argument
- R15: temporary register for assembler
- R16: trampoline register
- R28: frame pointer (FP)
- R29: global pointer (GP)
- R30: link register (LP)
- R31: stack pointer (SP)
- PC: program counter (PC)
-
- ==> U-Boot will use R10 to hold a pointer to the global data
-
-NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
-or current versions of GCC may "optimize" the code too much.
-
On RISC-V, the following registers are used:
x0: hard-wired zero (zero)