Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

[platform/kernel/u-boot.git] / README

diff --git a/README b/README
index ff72e47..eba6378 100644 (file)
--- a/README
+++ b/README
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2000 - 2011
+# (C) Copyright 2000 - 2012
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -420,6 +420,12 @@ The following options need to be configured:
                XWAY SoCs for booting from NOR flash. The U-Boot image needs to
                be swapped if a flash programmer is used.
 
+- ARM options:
+               CONFIG_SYS_EXCEPTION_VECTORS_HIGH
+
+               Select high exception vectors of the ARM core, e.g., do not
+               clear the V bit of the c1 register of CP15.
+
 - Linux Kernel Interface:
                CONFIG_CLOCKS_IN_MHZ
 
@@ -655,6 +661,15 @@ The following options need to be configured:
                to get the character out. Baud rates will need to default
                to something sensible.
 
+- Safe printf() functions
+               Define CONFIG_SYS_VSNPRINTF to compile in safe versions of
+               the printf() functions. These are defined in
+               include/vsprintf.h and include snprintf(), vsnprintf() and
+               so on. Code size increase is approximately 300-500 bytes.
+               If this option is not given then these functions will
+               silently discard their buffer size argument - this means
+               you are not getting any overflow checking in this case.
+
 - Boot Delay:  CONFIG_BOOTDELAY - in seconds
                Delay before automatically booting the default image;
                set to -1 to disable autoboot.
@@ -800,6 +815,7 @@ The following options need to be configured:
                                          (requires CONFIG_CMD_I2C)
                CONFIG_CMD_SETGETDCR      Support for DCR Register access
                                          (4xx only)
+               CONFIG_CMD_SF           * Read/write/erase SPI NOR flash
                CONFIG_CMD_SHA1SUM        print sha1 memory digest
                                          (requires CONFIG_CMD_MEMORY)
                CONFIG_CMD_SOURCE         "source" command Support
@@ -1020,6 +1036,9 @@ The following options need to be configured:
                        If this defined, the driver is quiet.
                        The driver doen't show link status messages.
 
+               CONFIG_CALXEDA_XGMAC
+               Support for the Calxeda XGMAC device
+
                CONFIG_DRIVER_LAN91C96
                Support for SMSC's LAN91C96 chips.
 
@@ -1185,6 +1204,14 @@ The following options need to be configured:
                        for your device
                        - CONFIG_USBD_PRODUCTID 0xFFFF
 
+- ULPI Layer Support:
+               The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
+               the generic ULPI layer. The generic layer accesses the ULPI PHY
+               via the platform viewport, so you need both the genric layer and
+               the viewport enabled. Currently only Chipidea/ARC based
+               viewport is supported.
+               To enable the ULPI layer support, define CONFIG_USB_ULPI and
+               CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
 
 - MMC Support:
                The MMC controller on the Intel PXA is supported. To
@@ -2171,6 +2198,25 @@ The following options need to be configured:
                allows to read/write in Dataflash via the standard
                commands cp, md...
 
+- Serial Flash support
+               CONFIG_CMD_SF
+
+               Defining this option enables SPI flash commands
+               'sf probe/read/write/erase/update'.
+
+               Usage requires an initial 'probe' to define the serial
+               flash parameters, followed by read/write/erase/update
+               commands.
+
+               The following defaults may be provided by the platform
+               to handle the common case when only a single serial
+               flash is present on the system.
+
+               CONFIG_SF_DEFAULT_BUS           Bus identifier
+               CONFIG_SF_DEFAULT_CS            Chip-select
+               CONFIG_SF_DEFAULT_MODE          (see include/spi.h)
+               CONFIG_SF_DEFAULT_SPEED         in Hz
+
 - SystemACE Support:
                CONFIG_SYSTEMACE