/m68k Files generic to m68k architecture
/microblaze Files generic to microblaze architecture
/mips Files generic to MIPS architecture
- /nds32 Files generic to NDS32 architecture
/nios2 Files generic to Altera NIOS2 architecture
/powerpc Files generic to PowerPC architecture
/riscv Files generic to RISC-V architecture
the RAM base is not zero, or RAM is divided into banks,
this variable needs to be recalcuated to get the address.
-- CONFIG_SYS_MEM_TOP_HIDE:
- If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
- this specified memory area will get subtracted from the top
- (end) of RAM and won't get "touched" at all by U-Boot. By
- fixing up gd->ram_size the Linux kernel should gets passed
- the now "corrected" memory size and won't touch it either.
- This should work for arch/ppc and arch/powerpc. Only Linux
- board ports in arch/powerpc with bootwrapper support that
- recalculate the memory size from the SDRAM controller setup
- will have to get fixed in Linux additionally.
-
- This option can be used as a workaround for the 440EPx/GRx
- CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
- be touched.
-
- WARNING: Please make sure that this value is a multiple of
- the Linux page size (normally 4k). If this is not the case,
- then the end address of the Linux memory will be located at a
- non page size aligned address and this could cause major
- problems.
-
- CONFIG_SYS_LOADS_BAUD_CHANGE:
Enable temporary baudrate change while serial download
LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, INTEGRITY).
* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
- IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
- Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC).
+ IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
+ Currently supported: ARM, Intel x86, MIPS, Nios II, PowerPC).
* Compression Type (uncompressed, gzip, bzip2)
* Load Address
* Entry Point
Note: on Nios II, we give "-G0" option to gcc and don't use gp
to access small data sections, so gp is free.
-On NDS32, the following registers are used:
-
- R0-R1: argument/return
- R2-R5: argument
- R15: temporary register for assembler
- R16: trampoline register
- R28: frame pointer (FP)
- R29: global pointer (GP)
- R30: link register (LP)
- R31: stack pointer (SP)
- PC: program counter (PC)
-
- ==> U-Boot will use R10 to hold a pointer to the global data
-
-NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
-or current versions of GCC may "optimize" the code too much.
-
On RISC-V, the following registers are used:
x0: hard-wired zero (zero)