ARC: Implement print_cpuinfo()

[platform/kernel/u-boot.git] / README

diff --git a/README b/README
index 21d1f8a..a46c7c6 100644 (file)
--- a/README
+++ b/README
@@ -528,20 +528,6 @@ The following options need to be configured:
                pointer. This is needed for the temporary stack before
                relocation.
 
-               CONFIG_SYS_MIPS_CACHE_MODE
-
-               Cache operation mode for the MIPS CPU.
-               See also arch/mips/include/asm/mipsregs.h.
-               Possible values are:
-                       CONF_CM_CACHABLE_NO_WA
-                       CONF_CM_CACHABLE_WA
-                       CONF_CM_UNCACHED
-                       CONF_CM_CACHABLE_NONCOHERENT
-                       CONF_CM_CACHABLE_CE
-                       CONF_CM_CACHABLE_COW
-                       CONF_CM_CACHABLE_CUW
-                       CONF_CM_CACHABLE_ACCELERATED
-
                CONFIG_XWAY_SWAP_BYTES
 
                Enable compilation of tools/xway-swap-bytes needed for Lantiq
@@ -3251,8 +3237,8 @@ Low Level (hardware related) configuration options:
                a 16 bit bus.
                Not all NAND drivers use this symbol.
                Example of drivers that use it:
-               - drivers/mtd/nand/ndfc.c
-               - drivers/mtd/nand/mxc_nand.c
+               - drivers/mtd/nand/raw/ndfc.c
+               - drivers/mtd/nand/raw/mxc_nand.c
 
 - CONFIG_SYS_NDFC_EBC0_CFG
                Sets the EBC0_CFG register for the NDFC. If not defined
@@ -3369,7 +3355,7 @@ Low Level (hardware related) configuration options:
 - CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
                Option to disable subpage write in NAND driver
                driver that uses this:
-               drivers/mtd/nand/davinci_nand.c
+               drivers/mtd/nand/raw/davinci_nand.c
 
 Freescale QE/FMAN Firmware Support:
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