#
-# (C) Copyright 2000 - 2004
+# (C) Copyright 2000 - 2005
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
========
This directory contains the source code for U-Boot, a boot loader for
-Embedded boards based on PowerPC and ARM processors, which can be
-installed in a boot ROM and used to initialize and test the hardware
-or to download and run application code.
+Embedded boards based on PowerPC, ARM, MIPS and several other
+processors, which can be installed in a boot ROM and used to
+initialize and test the hardware or to download and run application
+code.
The development of U-Boot is closely related to Linux: some parts of
the source code originate in the Linux source tree, we have some
- board Board dependent files
- common Misc architecture independent functions
- cpu CPU specific files
- - 74xx_7xx Files specific to Motorola MPC74xx and 7xx CPUs
+ - 74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
- arm720t Files specific to ARM 720 CPUs
- arm920t Files specific to ARM 920 CPUs
+ - at91rm9200 Files specific to Atmel AT91RM9200 CPU
+ - imx Files specific to Freescale MC9328 i.MX CPUs
+ - s3c24x0 Files specific to Samsung S3C24X0 CPUs
- arm925t Files specific to ARM 925 CPUs
- arm926ejs Files specific to ARM 926 CPUs
- - at91rm9200 Files specific to Atmel AT91RM9200 CPUs
+ - arm1136 Files specific to ARM 1136 CPUs
- i386 Files specific to i386 CPUs
- ixp Files specific to Intel XScale IXP CPUs
- - mcf52x2 Files specific to Motorola ColdFire MCF52x2 CPUs
+ - mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
- mips Files specific to MIPS CPUs
- - mpc5xx Files specific to Motorola MPC5xx CPUs
- - mpc5xxx Files specific to Motorola MPC5xxx CPUs
- - mpc8xx Files specific to Motorola MPC8xx CPUs
- - mpc824x Files specific to Motorola MPC824x CPUs
- - mpc8260 Files specific to Motorola MPC8260 CPUs
- - mpc85xx Files specific to Motorola MPC85xx CPUs
+ - mpc5xx Files specific to Freescale MPC5xx CPUs
+ - mpc5xxx Files specific to Freescale MPC5xxx CPUs
+ - mpc8xx Files specific to Freescale MPC8xx CPUs
+ - mpc8220 Files specific to Freescale MPC8220 CPUs
+ - mpc824x Files specific to Freescale MPC824x CPUs
+ - mpc8260 Files specific to Freescale MPC8260 CPUs
+ - mpc85xx Files specific to Freescale MPC85xx CPUs
- nios Files specific to Altera NIOS CPUs
- - ppc4xx Files specific to IBM PowerPC 4xx CPUs
+ - nios2 Files specific to Altera Nios-II CPUs
+ - ppc4xx Files specific to AMCC PowerPC 4xx CPUs
- pxa Files specific to Intel XScale PXA CPUs
- s3c44b0 Files specific to Samsung S3C44B0 CPUs
- sa1100 Files specific to Intel StrongARM SA1100 CPUs
-------------------
CONFIG_MPC823, CONFIG_MPC850, CONFIG_MPC855, CONFIG_MPC860
or CONFIG_MPC5xx
+ or CONFIG_MPC8220
or CONFIG_MPC824X, CONFIG_MPC8260
or CONFIG_MPC85xx
or CONFIG_IOP480
CONFIG_ARM7
CONFIG_PXA250
+ MicroBlaze based CPUs:
+ ----------------------
+ CONFIG_MICROBLAZE
+
+ Nios-2 based CPUs:
+ ----------------------
+ CONFIG_NIOS2
+
- Board Type: Define exactly one of
PowerPC based boards:
---------------------
- CONFIG_ADCIOP, CONFIG_ICU862 CONFIG_RPXsuper,
- CONFIG_ADS860, CONFIG_IP860, CONFIG_SM850,
- CONFIG_AMX860, CONFIG_IPHASE4539, CONFIG_SPD823TS,
- CONFIG_AR405, CONFIG_IVML24, CONFIG_SXNI855T,
- CONFIG_BAB7xx, CONFIG_IVML24_128, CONFIG_Sandpoint8240,
- CONFIG_CANBT, CONFIG_IVML24_256, CONFIG_Sandpoint8245,
- CONFIG_CCM, CONFIG_IVMS8, CONFIG_TQM823L,
- CONFIG_CPCI405, CONFIG_IVMS8_128, CONFIG_TQM850L,
- CONFIG_CPCI4052, CONFIG_IVMS8_256, CONFIG_TQM855L,
- CONFIG_CPCIISER4, CONFIG_LANTEC, CONFIG_TQM860L,
- CONFIG_CPU86, CONFIG_MBX, CONFIG_TQM8260,
- CONFIG_CRAYL1, CONFIG_MBX860T, CONFIG_TTTech,
- CONFIG_CU824, CONFIG_MHPC, CONFIG_UTX8245,
- CONFIG_DASA_SIM, CONFIG_MIP405, CONFIG_W7OLMC,
- CONFIG_DU405, CONFIG_MOUSSE, CONFIG_W7OLMG,
- CONFIG_ELPPC, CONFIG_MPC8260ADS, CONFIG_WALNUT405,
- CONFIG_ERIC, CONFIG_MUSENKI, CONFIG_ZUMA,
- CONFIG_ESTEEM192E, CONFIG_MVS1, CONFIG_c2mon,
- CONFIG_ETX094, CONFIG_NX823, CONFIG_cogent_mpc8260,
- CONFIG_EVB64260, CONFIG_OCRTC, CONFIG_cogent_mpc8xx,
- CONFIG_FADS823, CONFIG_ORSG, CONFIG_ep8260,
- CONFIG_FADS850SAR, CONFIG_OXC, CONFIG_gw8260,
- CONFIG_FADS860T, CONFIG_PCI405, CONFIG_hermes,
- CONFIG_FLAGADM, CONFIG_PCIPPC2, CONFIG_hymod,
- CONFIG_FPS850L, CONFIG_PCIPPC6, CONFIG_lwmon,
- CONFIG_GEN860T, CONFIG_PIP405, CONFIG_pcu_e,
- CONFIG_GENIETV, CONFIG_PM826, CONFIG_ppmc8260,
- CONFIG_GTH, CONFIG_RPXClassic, CONFIG_rsdproto,
- CONFIG_IAD210, CONFIG_RPXlite, CONFIG_sbc8260,
- CONFIG_EBONY, CONFIG_sacsng, CONFIG_FPS860L,
- CONFIG_V37, CONFIG_ELPT860, CONFIG_CMI,
- CONFIG_NETVIA, CONFIG_RBC823, CONFIG_ZPC1900,
- CONFIG_MPC8540ADS, CONFIG_MPC8560ADS, CONFIG_QS850,
- CONFIG_QS823, CONFIG_QS860T, CONFIG_DB64360,
- CONFIG_DB64460, CONFIG_DUET_ADS
+ CONFIG_ADCIOP CONFIG_GEN860T CONFIG_PCIPPC2
+ CONFIG_ADS860 CONFIG_GENIETV CONFIG_PCIPPC6
+ CONFIG_AMX860 CONFIG_GTH CONFIG_pcu_e
+ CONFIG_AP1000 CONFIG_gw8260 CONFIG_PIP405
+ CONFIG_AR405 CONFIG_hermes CONFIG_PM826
+ CONFIG_BAB7xx CONFIG_hymod CONFIG_ppmc8260
+ CONFIG_c2mon CONFIG_IAD210 CONFIG_QS823
+ CONFIG_CANBT CONFIG_ICU862 CONFIG_QS850
+ CONFIG_CCM CONFIG_IP860 CONFIG_QS860T
+ CONFIG_CMI CONFIG_IPHASE4539 CONFIG_RBC823
+ CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RPXClassic
+ CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXlite
+ CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXsuper
+ CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_rsdproto
+ CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_sacsng
+ CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_Sandpoint8240
+ CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8245
+ CONFIG_CSB272 CONFIG_LANTEC CONFIG_sbc8260
+ CONFIG_CU824 CONFIG_lwmon CONFIG_sbc8560
+ CONFIG_DASA_SIM CONFIG_MBX CONFIG_SM850
+ CONFIG_DB64360 CONFIG_MBX860T CONFIG_SPD823TS
+ CONFIG_DB64460 CONFIG_MHPC CONFIG_STXGP3
+ CONFIG_DU405 CONFIG_MIP405 CONFIG_SXNI855T
+ CONFIG_DUET_ADS CONFIG_MOUSSE CONFIG_TQM823L
+ CONFIG_EBONY CONFIG_MPC8260ADS CONFIG_TQM8260
+ CONFIG_ELPPC CONFIG_MPC8540ADS CONFIG_TQM850L
+ CONFIG_ELPT860 CONFIG_MPC8540EVAL CONFIG_TQM855L
+ CONFIG_ep8260 CONFIG_MPC8560ADS CONFIG_TQM860L
+ CONFIG_ERIC CONFIG_MUSENKI CONFIG_TTTech
+ CONFIG_ESTEEM192E CONFIG_MVS1 CONFIG_UTX8245
+ CONFIG_ETX094 CONFIG_NETPHONE CONFIG_V37
+ CONFIG_EVB64260 CONFIG_NETTA CONFIG_W7OLMC
+ CONFIG_FADS823 CONFIG_NETVIA CONFIG_W7OLMG
+ CONFIG_FADS850SAR CONFIG_NX823 CONFIG_WALNUT
+ CONFIG_FADS860T CONFIG_OCRTC CONFIG_ZPC1900
+ CONFIG_FLAGADM CONFIG_ORSG CONFIG_ZUMA
+ CONFIG_FPS850L CONFIG_OXC
+ CONFIG_FPS860L CONFIG_PCI405
ARM based boards:
-----------------
- CONFIG_HHP_CRADLE, CONFIG_DNP1110, CONFIG_EP7312,
- CONFIG_IMPA7, CONFIG_LART, CONFIG_LUBBOCK,
- CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610,
- CONFIG_H2_OMAP1610, CONFIG_SHANNON, CONFIG_SMDK2400,
- CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9,
- CONFIG_AT91RM9200DK
+ CONFIG_ARMADILLO, CONFIG_AT91RM9200DK, CONFIG_CERF250,
+ CONFIG_CSB637, CONFIG_DNP1110, CONFIG_EP7312,
+ CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, CONFIG_IMPA7,
+ CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, CONFIG_KB9202,
+ CONFIG_LART, CONFIG_LPD7A400, CONFIG_LUBBOCK,
+ CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4, CONFIG_SHANNON,
+ CONFIG_P2_OMAP730, CONFIG_SMDK2400, CONFIG_SMDK2410,
+ CONFIG_TRAB, CONFIG_VCMA9
+
+ MicroBlaze based boards:
+ ------------------------
+
+ CONFIG_SUZAKU
+
+ Nios-2 based boards:
+ ------------------------
+
+ CONFIG_PCI5441 CONFIG_PK1C20
- CPU Module Type: (if CONFIG_COGENT is defined)
CFG_8260ADS - original MPC8260ADS
CFG_8266ADS - MPC8266ADS
CFG_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
-
+ CFG_8272ADS - MPC8272ADS
- MPC824X Family Member (if CONFIG_MPC824X is defined)
Define exactly one of
CONFIG_MPC8240, CONFIG_MPC8245
- 8xx CPU Options: (if using an MPC8xx cpu)
- Define one or more of
- CONFIG_8xx_GCLK_FREQ - if get_gclk_freq() cannot work
+ CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
+ get_gclk_freq() cannot work
e.g. if there is no 32KHz
reference PIT/RTC clock
+ CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
+ or XTAL/EXTAL)
-- 859/866 CPU options: (if using a MPC859 or MPC866 CPU):
- CFG_866_OSCCLK
- CFG_866_CPUCLK_MIN
- CFG_866_CPUCLK_MAX
- CFG_866_CPUCLK_DEFAULT
+- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
+ CFG_8xx_CPUCLK_MIN
+ CFG_8xx_CPUCLK_MAX
+ CONFIG_8xx_CPUCLK_DEFAULT
See doc/README.MPC866
CFG_MEASURE_CPUCLK
values. Mostly useful for board bringup to make sure
the PLL is locked at the intended frequency. Note
that this requires a (stable) reference clock (32 kHz
- RTC clock),
+ RTC clock or CFG_8XX_XIN)
- Linux Kernel Interface:
CONFIG_CLOCKS_IN_MHZ
expect it to be in bytes, others in MB.
Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
+ CONFIG_OF_FLAT_TREE
+
+ New kernel versions are expecting firmware settings to be
+ passed using flat open firmware trees.
+ The environment variable "disable_of", when set, disables this
+ functionality.
+
+ CONFIG_OF_FLAT_TREE_MAX_SIZE
+
+ The maximum size of the constructed OF tree.
+
+ OF_CPU - The proper name of the cpus node.
+ OF_TBCLK - The timebase frequency.
+
+- Serial Ports:
+ CFG_PL010_SERIAL
+
+ Define this if you want support for Amba PrimeCell PL010 UARTs.
+
+ CFG_PL011_SERIAL
+
+ Define this if you want support for Amba PrimeCell PL011 UARTs.
+
+ CONFIG_PL011_CLOCK
+
+ If you have Amba PrimeCell PL011 UARTs, set this variable to
+ the clock speed of the UARTs.
+
+ CONFIG_PL01x_PORTS
+
+ If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
+ define this to a list of base addresses for each (supported)
+ port. See e.g. include/configs/versatile.h
+
+
- Console Interface:
Depending on board, define exactly one serial port
(like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
(RTS/CTS) and UART's built-in FIFO. Set the number of
bytes the interrupt driven input buffer should have.
- Set to 0 to disable this feature (this is the default).
- This will also disable hardware handshake.
+ Leave undefined to disable this feature, including
+ disable the buffer and hardware handshake.
- Console UART Number:
CONFIG_UART1_CONSOLE
- IBM PPC4xx only.
+ AMCC PPC4xx only.
If defined internal UART1 (and not UART0) is used
as default U-Boot console.
CFG_CMD_ASKENV * ask for env variable
CFG_CMD_AUTOSCRIPT Autoscript Support
CFG_CMD_BDI bdinfo
- CFG_CMD_BEDBUG Include BedBug Debugger
+ CFG_CMD_BEDBUG * Include BedBug Debugger
CFG_CMD_BMP * BMP support
+ CFG_CMD_BSP * Board specific commands
CFG_CMD_BOOTD bootd
- CFG_CMD_CACHE icache, dcache
+ CFG_CMD_CACHE * icache, dcache
CFG_CMD_CONSOLE coninfo
CFG_CMD_DATE * support for RTC, date/time...
- CFG_CMD_DHCP DHCP support
+ CFG_CMD_DHCP * DHCP support
CFG_CMD_DIAG * Diagnostics
CFG_CMD_DOC * Disk-On-Chip Support
- CFG_CMD_DTT Digital Therm and Thermostat
+ CFG_CMD_DTT * Digital Therm and Thermostat
CFG_CMD_ECHO * echo arguments
CFG_CMD_EEPROM * EEPROM read/write support
- CFG_CMD_ELF bootelf, bootvx
+ CFG_CMD_ELF * bootelf, bootvx
CFG_CMD_ENV saveenv
CFG_CMD_FDC * Floppy Disk Support
- CFG_CMD_FAT FAT partition support
+ CFG_CMD_FAT * FAT partition support
CFG_CMD_FDOS * Dos diskette Support
CFG_CMD_FLASH flinfo, erase, protect
CFG_CMD_FPGA FPGA device initialization support
CFG_CMD_IMLS List all found images
CFG_CMD_IMMAP * IMMR dump support
CFG_CMD_IRQ * irqinfo
- CFG_CMD_ITEST * Integer/string test of 2 values
+ CFG_CMD_ITEST Integer/string test of 2 values
CFG_CMD_JFFS2 * JFFS2 Support
CFG_CMD_KGDB * kgdb
CFG_CMD_LOADB loadb
CFG_CMD_LOADS loads
CFG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
- loop, mtest
+ loop, loopw, mtest
CFG_CMD_MISC Misc functions like sleep etc
- CFG_CMD_MMC MMC memory mapped support
- CFG_CMD_MII MII utility commands
+ CFG_CMD_MMC * MMC memory mapped support
+ CFG_CMD_MII * MII utility commands
CFG_CMD_NAND * NAND support
CFG_CMD_NET bootp, tftpboot, rarpboot
CFG_CMD_PCI * pciinfo
CFG_CMD_PORTIO * Port I/O
CFG_CMD_REGINFO * Register dump
CFG_CMD_RUN run command in env variable
- CFG_CMD_SAVES save S record dump
+ CFG_CMD_SAVES * save S record dump
CFG_CMD_SCSI * SCSI Support
CFG_CMD_SDRAM * print SDRAM configuration information
+ (requires CFG_CMD_I2C)
CFG_CMD_SETGETDCR Support for DCR Register access (4xx only)
CFG_CMD_SPI * SPI serial bus support
CFG_CMD_USB * USB support
CFG_CMD_VFD * VFD support (TRAB)
CFG_CMD_BSP * Board SPecific functions
+ CFG_CMD_CDP * Cisco Discover Protocol support
-----------------------------------------------
CFG_CMD_ALL all
- CFG_CMD_DFL Default configuration; at the moment
+ CONFIG_CMD_DFL Default configuration; at the moment
this is includes all commands, except
the ones marked with "*" in the list
above.
If you don't define CONFIG_COMMANDS it defaults to
- CFG_CMD_DFL in include/cmd_confdefs.h. A board can
+ CONFIG_CMD_DFL in include/cmd_confdefs.h. A board can
override the default settings in the respective
include file.
CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
CONFIG_RTC_DS164x - use Dallas DS164x RTC
+ CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
Note that if the RTC uses I2C, then the I2C interface
must also be configured. See I2C Support, below.
CONFIG_LAN91C96_USE_32_BIT
Define this to enable 32 bit addressing
+ CONFIG_DRIVER_SMC91111
+ Support for SMSC's LAN91C111 chip
+
+ CONFIG_SMC91111_BASE
+ Define this to hold the physical address
+ of the device (I/O space)
+
+ CONFIG_SMC_USE_32_BIT
+ Define this if data bus is 32 bits
+
+ CONFIG_SMC_USE_IOFUNCS
+ Define this to use i/o functions instead of macros
+ (some hardware wont work with macros)
+
- USB Support:
At the moment only the UHCI host controller is
supported (PIP405, MIP405, MPC5200); define
CONFIG_USB_UHCI to enable it.
define CONFIG_USB_KEYBOARD to enable the USB Keyboard
- end define CONFIG_USB_STORAGE to enable the USB
+ and define CONFIG_USB_STORAGE to enable the USB
storage devices.
Note:
Supported are USB Keyboards and USB Floppy drives
enabled with CFG_CMD_MMC. The MMC driver also works with
the FAT fs. This is enabled with CFG_CMD_FAT.
+- Journaling Flash filesystem support:
+ CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
+ CONFIG_JFFS2_NAND_DEV
+ Define these for a default partition on a NAND device
+
+ CFG_JFFS2_FIRST_SECTOR,
+ CFG_JFFS2_FIRST_BANK, CFG_JFFS2_NUM_BANKS
+ Define these for a default partition on a NOR device
+
+ CFG_JFFS_CUSTOM_PART
+ Define this to create an own partition. You have to provide a
+ function struct part_info* jffs2_part_info(int part_num)
+
+ If you define only one JFFS2 partition you may also want to
+ #define CFG_JFFS_SINGLE_PART 1
+ to disable the command chpart. This is the default when you
+ have not defined a custom partition
+
- Keyboard Support:
CONFIG_ISA_KEYBOARD
Enable Chips & Technologies 69000 Video chip
CONFIG_VIDEO_SMI_LYNXEM
- Enable Silicon Motion SMI 712/710/810 Video chip
- Videomode are selected via environment 'videomode' with
- standard LiLo mode numbers.
- Following modes are supported (* is default):
-
- 800x600 1024x768 1280x1024
- 256 (8bit) 303* 305 307
- 65536 (16bit) 314 317 31a
- 16,7 Mill (24bit) 315 318 31b
+ Enable Silicon Motion SMI 712/710/810 Video chip. The
+ video output is selected via environment 'videoout'
+ (1 = LCD and 2 = CRT). If videoout is undefined, CRT is
+ assumed.
+
+ For the CT69000 and SMI_LYNXEM drivers, videomode is
+ selected via environment 'videomode'. Two diferent ways
+ are possible:
+ - "videomode=num" 'num' is a standard LiLo mode numbers.
+ Following standard modes are supported (* is default):
+
+ Colors 640x480 800x600 1024x768 1152x864 1280x1024
+ -------------+---------------------------------------------
+ 8 bits | 0x301* 0x303 0x305 0x161 0x307
+ 15 bits | 0x310 0x313 0x316 0x162 0x319
+ 16 bits | 0x311 0x314 0x317 0x163 0x31A
+ 24 bits | 0x312 0x315 0x318 ? 0x31B
+ -------------+---------------------------------------------
(i.e. setenv videomode 317; saveenv; reset;)
+ - "videomode=bootargs" all the video parameters are parsed
+ from the bootargs. (See drivers/videomodes.c)
+
+
CONFIG_VIDEO_SED13806
Enable Epson SED13806 driver. This driver supports 8bpp
and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
If this option is set, the environment is checked for
a variable "splashimage". If found, the usual display
of logo, copyright and system information on the LCD
- is supressed and the BMP image at the address
+ is suppressed and the BMP image at the address
specified in "splashimage" is loaded instead. The
console is redirected to the "nulldev", too. This
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.
+- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
+
+ If this option is set, additionally to standard BMP
+ images, gzipped BMP images can be displayed via the
+ splashscreen support or the bmp command.
+
- Compression support:
CONFIG_BZIP2
the malloc area (as defined by CFG_MALLOC_LEN) should
be at least 4MB.
+- MII/PHY support:
+ CONFIG_PHY_ADDR
+
+ The address of PHY on MII bus.
+
+ CONFIG_PHY_CLOCK_FREQ (ppc4xx)
+
+ The clock frequency of the MII bus
+
+ CONFIG_PHY_GIGE
+
+ If this option is set, support for speed/duplex
+ detection of Gigabit PHY is included.
+
+ CONFIG_PHY_RESET_DELAY
+
+ Some PHY like Intel LXT971A need extra delay after
+ reset before any MII register access is possible.
+ For such PHY, set this option to the usec delay
+ required. (minimum 300usec for LXT971A)
+
+ CONFIG_PHY_CMD_DELAY (ppc4xx)
+
+ Some PHY like Intel LXT971A need extra delay after
+ command issued before MII status register can be read
+
- Ethernet address:
CONFIG_ETHADDR
CONFIG_ETH2ADDR
environment variable is passed as option 12 to
the DHCP server.
+ - CDP Options:
+ CONFIG_CDP_DEVICE_ID
+
+ The device id used in CDP trigger frames.
+
+ CONFIG_CDP_DEVICE_ID_PREFIX
+
+ A two character string which is prefixed to the MAC address
+ of the device.
+
+ CONFIG_CDP_PORT_ID
+
+ A printf format string which contains the ascii name of
+ the port. Normally is set to "eth%d" which sets
+ eth0 for the first ethernet, eth1 for the second etc.
+
+ CONFIG_CDP_CAPABILITIES
+
+ A 32bit integer which indicates the device capabilities;
+ 0x00000010 for a normal host which does not forwards.
+
+ CONFIG_CDP_VERSION
+
+ An ascii string containing the version of the software.
+
+ CONFIG_CDP_PLATFORM
+
+ An ascii string containing the name of the platform.
+
+ CONFIG_CDP_TRIGGER
+
+ A 32bit integer sent on the trigger.
+
+ CONFIG_CDP_POWER_CONSUMPTION
+
+ A 16bit integer containing the power consumption of the
+ device in .1 of milliwatts.
+
+ CONFIG_CDP_APPLIANCE_VLAN_TYPE
+
+ A byte containing the id of the VLAN.
+
- Status LED: CONFIG_STATUS_LED
Several configurations allow to display the current
custom i2c_init_board() routine in boards/xxx/board.c
is run early in the boot sequence.
+ CONFIG_I2CFAST (PPC405GP|PPC405EP only)
+
+ This option enables configuration of bi_iic_fast[] flags
+ in u-boot bd_info structure based on u-boot environment
+ variable "i2cfast". (see also i2cfast)
+
- SPI Support: CONFIG_SPI
Enables SPI driver (so far only tested with
remaining RAM in a form that can be passed as boot
argument to Linux, for instance like that:
- setenv bootargs ... mem=\$(mem)
+ setenv bootargs ... mem=\${mem}
saveenv
This way you can tell Linux not to use this memory,
default value of 5 is used.
- Command Interpreter:
+ CFG_AUTO_COMPLETE
+
+ Enable auto completion of commands using TAB.
+
CFG_HUSH_PARSER
Define this variable to enable the "hush" shell (from
When SystemACE support is added, the "ace" device type
becomes available to the fat commands, i.e. fatls.
+- TFTP Fixed UDP Port:
+ CONFIG_TFTP_PORT
+
+ If this is defined, the environment variable tftpsrcp
+ is used to supply the TFTP UDP source port value.
+ If tftpsrcp isn't defined, the normal pseudo-random port
+ number generator is used.
+
+ Also, the environment variable tftpdstp is used to supply
+ the TFTP UDP destination port value. If tftpdstp isn't
+ defined, the normal port 69 is used.
+
+ The purpose for tftpsrcp is to allow a TFTP server to
+ blindly start the TFTP transfer using the pre-configured
+ target IP address and UDP port. This has the effect of
+ "punching through" the (Windows XP) firewall, allowing
+ the remainder of the TFTP transfer to proceed normally.
+ A better solution is to properly configure the firewall,
+ but sometimes that is not allowed.
+
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
This option also enables the building of the cfi_flash driver
in the drivers directory
+- CFG_FLASH_QUIET_TEST
+ If this option is defined, the common CFI flash doesn't
+ print it's warning upon not recognized FLASH banks. This
+ is useful, if some of the configured banks are only
+ optionally available.
+
- CFG_RX_ETH_BUFFER:
Defines the number of ethernet receive buffers. On some
ethernet controllers it is recommended to set this value
The length in bytes of the EEPROM memory array address. Note
that this is NOT the chip address length!
+ - CFG_I2C_EEPROM_ADDR_OVERFLOW:
+ EEPROM chips that implement "address overflow" are ones
+ like Catalyst 24WC04/08/16 which has 9/10/11 bits of
+ address and the extra bits end up in the "chip address" bit
+ slots. This makes a 24WC08 (1Kbyte) chip look like four 256
+ byte chips.
+
+ Note that we consider the length of the address field to
+ still be one byte because the extra address bits are hidden
+ in the chip address.
+
- CFG_EEPROM_SIZE:
The size in bytes of the EEPROM device.
environment area within the total memory of your DataFlash placed
at the specified address.
+- CFG_ENV_IS_IN_NAND:
+
+ Define this if you have a NAND device which you want to use
+ for the environment.
+
+ - CFG_ENV_OFFSET:
+ - CFG_ENV_SIZE:
+
+ These two #defines specify the offset and size of the environment
+ area within the first NAND device.
- CFG_SPI_INIT_OFFSET
source code. It is used to make hardware dependant
initializations.
-- CFG_IMMR: Physical address of the Internal Memory Mapped
- Register; DO NOT CHANGE! (11-4)
- [MPC8xx systems only]
+- CFG_IMMR: Physical address of the Internal Memory.
+ DO NOT CHANGE unless you know exactly what you're
+ doing! (11-4) [MPC8xx/82xx systems only]
- CFG_INIT_RAM_ADDR:
CFG_POCMR2_MASK_ATTRIB: (MPC826x only)
Overrides the default PCI memory map in cpu/mpc8260/pci.c if set.
+- CONFIG_ETHER_ON_FEC[12]
+ Define to enable FEC[12] on a 8xx series processor.
+
+- CONFIG_FEC[12]_PHY
+ Define to the hardcoded PHY address which corresponds
+ to the given FEC; i. e.
+ #define CONFIG_FEC1_PHY 4
+ means that the PHY with address 4 is connected to FEC1
+
+ When set to -1, means to probe for first available.
+
+- CONFIG_FEC[12]_PHY_NORXERR
+ The PHY does not have a RXERR line (RMII only).
+ (so program the FEC to ignore it).
+
+- CONFIG_RMII
+ Enable RMII mode for all FECs.
+ Note that this is a global option, we can't
+ have one FEC in standard MII mode and another in RMII mode.
+
+- CONFIG_CRC32_VERIFY
+ Add a verify option to the crc32 command.
+ The syntax is:
+
+ => crc32 -v <address> <count> <crc32>
+
+ Where address/count indicate a memory area
+ and crc32 is the correct crc32 which the
+ area should have.
+
+- CONFIG_LOOPW
+ Add the "loopw" memory command. This only takes effect if
+ the memory commands are activated globally (CFG_CMD_MEM).
+
+- CONFIG_MX_CYCLIC
+ Add the "mdc" and "mwc" memory commands. These are cyclic
+ "md/mw" commands.
+ Examples:
+
+ => mdc.b 10 4 500
+ This command will print 4 bytes (10,11,12,13) each 500 ms.
+
+ => mwc.l 100 12345678 10
+ This command will write 12345678 to address 100 all 10 ms.
+
+ This only takes effect if the memory commands are activated
+ globally (CFG_CMD_MEM).
+
+- CONFIG_SKIP_LOWLEVEL_INIT
+- CONFIG_SKIP_RELOCATE_UBOOT
+
+ [ARM only] If these variables are defined, then
+ certain low level initializations (like setting up
+ the memory controller) are omitted and/or U-Boot does
+ not relocate itself into RAM.
+ Normally these variables MUST NOT be defined. The
+ only exception is when U-Boot is loaded (to RAM) by
+ some other boot loader or by a debugger which
+ performs these intializations itself.
+
+
Building the Software:
======================
where "NAME_config" is the name of one of the existing
configurations; the following names are supported:
- ADCIOP_config GTH_config TQM850L_config
- ADS860_config IP860_config TQM855L_config
- AR405_config IVML24_config TQM860L_config
- CANBT_config IVMS8_config WALNUT405_config
- CPCI405_config LANTEC_config cogent_common_config
- CPCIISER4_config MBX_config cogent_mpc8260_config
- CU824_config MBX860T_config cogent_mpc8xx_config
- ESTEEM192E_config RPXlite_config hermes_config
- ETX094_config RPXsuper_config hymod_config
- FADS823_config SM850_config lwmon_config
- FADS850SAR_config SPD823TS_config pcu_e_config
- FADS860T_config SXNI855T_config rsdproto_config
- FPS850L_config Sandpoint8240_config sbc8260_config
- GENIETV_config TQM823L_config PIP405_config
- GEN860T_config EBONY_config FPS860L_config
- ELPT860_config cmi_mpc5xx_config NETVIA_config
- at91rm9200dk_config omap1510inn_config MPC8260ADS_config
- omap1610inn_config ZPC1900_config MPC8540ADS_config
- MPC8560ADS_config QS850_config QS823_config
- QS860T_config DUET_ADS_config omap1610h2_config
-
-Note: for some board special configuration names may exist; check if
- additional information is available from the board vendor; for
- instance, the TQM8xxL systems run normally at 50 MHz and use a
- SCC for 10baseT ethernet; there are also systems with 80 MHz
- CPU clock, and an optional Fast Ethernet module is available
- for CPU's with FEC. You can select such additional "features"
+ ADCIOP_config FPS860L_config omap730p2_config
+ ADS860_config GEN860T_config pcu_e_config
+ Alaska8220_config
+ AR405_config GENIETV_config PIP405_config
+ at91rm9200dk_config GTH_config QS823_config
+ CANBT_config hermes_config QS850_config
+ cmi_mpc5xx_config hymod_config QS860T_config
+ cogent_common_config IP860_config RPXlite_config
+ cogent_mpc8260_config IVML24_config RPXlite_DW_config
+ cogent_mpc8xx_config IVMS8_config RPXsuper_config
+ CPCI405_config JSE_config rsdproto_config
+ CPCIISER4_config LANTEC_config Sandpoint8240_config
+ csb272_config lwmon_config sbc8260_config
+ CU824_config MBX860T_config sbc8560_33_config
+ DUET_ADS_config MBX_config sbc8560_66_config
+ EBONY_config MPC8260ADS_config SM850_config
+ ELPT860_config MPC8540ADS_config SPD823TS_config
+ ESTEEM192E_config MPC8540EVAL_config stxgp3_config
+ ETX094_config MPC8560ADS_config SXNI855T_config
+ FADS823_config NETVIA_config TQM823L_config
+ FADS850SAR_config omap1510inn_config TQM850L_config
+ FADS860T_config omap1610h2_config TQM855L_config
+ FPS850L_config omap1610inn_config TQM860L_config
+ omap5912osk_config walnut_config
+ omap2420h4_config Yukon8220_config
+ ZPC1900_config
+
+Note: for some board special configuration names may exist; check if
+ additional information is available from the board vendor; for
+ instance, the TQM823L systems are available without (standard)
+ or with LCD support. You can select such additional "features"
when chosing the configuration, i. e.
- make TQM860L_config
- - will configure for a plain TQM860L, i. e. 50MHz, no FEC
-
- make TQM860L_FEC_config
- - will configure for a TQM860L at 50MHz with FEC for ethernet
-
- make TQM860L_80MHz_config
- - will configure for a TQM860L at 80 MHz, with normal 10baseT
- interface
-
- make TQM860L_FEC_80MHz_config
- - will configure for a TQM860L at 80 MHz with FEC for ethernet
+ make TQM823L_config
+ - will configure for a plain TQM823L, i. e. no LCD support
make TQM823L_LCD_config
- will configure for a TQM823L with U-Boot console on LCD
- make TQM823L_LCD_80MHz_config
- - will configure for a TQM823L at 80 MHz with U-Boot console on LCD
-
etc.
coninfo - print console devices and informations
ide - IDE sub-system
loop - infinite loop on address range
+loopw - infinite write loop on address range
mtest - simple RAM test
icache - enable or disable instruction cache
dcache - enable or disable data cache
This can be used to load and uncompress arbitrary
data.
+ i2cfast - (PPC405GP|PPC405EP only)
+ if set to 'y' configures Linux I2C driver for fast
+ mode (400kHZ). This environment variable is used in
+ initialization code. So, for changes to be effective
+ it must be saved and board must be reset.
+
initrd_high - restrict positioning of initrd images:
If this variable is not set, initrd images will be
copied to the highest possible address in RAM; this
bootstopkey - see CONFIG_AUTOBOOT_STOP_STR
+ ethprime - When CONFIG_NET_MULTI is enabled controls which
+ interface is used first.
+
+ ethact - When CONFIG_NET_MULTI is enabled controls which
+ interface is currently active. For example you
+ can do the following
+
+ => setenv ethact FEC ETHERNET
+ => ping 192.168.0.1 # traffic sent on FEC ETHERNET
+ => setenv ethact SCC ETHERNET
+ => ping 10.0.0.1 # traffic sent on SCC ETHERNET
+
+ netretry - When set to "no" each network operation will
+ either succeed or fail without retrying.
+ When set to "once" the network operation will
+ fail when all the available network interfaces
+ are tried once without success.
+ Useful on scripts which control the retry operation
+ themselves.
+
+ tftpsrcport - If this is set, the value is used for TFTP's
+ UDP source port.
+
+ tftpdstport - If this is set, the value is used for TFTP's UDP
+ destination port instead of the Well Know Port 69.
+
+ vlan - When set to a value < 4095 the traffic over
+ ethernet is encapsulated/received over 802.1q
+ VLAN tagged frames.
The following environment variables may be used and automatically
updated by the network boot commands ("bootp" and "rarpboot"),
- supports environment variables (through setenv / saveenv commands)
- several commands on one line, separated by ';'
-- variable substitution using "... $(name) ..." syntax
+- variable substitution using "... ${name} ..." syntax
- special characters ('$', ';') can be escaped by prefixing with '\',
for example:
- setenv bootcmd bootm \$(address)
+ setenv bootcmd bootm \${address}
- You can also escape text by enclosing in single apostrophes, for example:
setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
-n ==> set image name to 'name'
-d ==> use image data from 'datafile'
-Right now, all Linux kernels use the same load address (0x00000000),
-but the entry point address depends on the kernel version:
+Right now, all Linux kernels for PowerPC systems use the same load
+address (0x00000000), but the entry point address depends on the
+kernel version:
- 2.2.x kernels have the entry point at 0x0000000C,
- 2.3.x and later kernels have the entry point at 0x00000000.
stage-2 loader which in turn loads and then invokes the kernel
proper. Loader sources will eventually appear in the NetBSD source
tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
-meantime, send mail to bruno@exet-ag.de and/or wd@denx.de for
-details.
+meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
Implementation Internals:
CFG_INIT_RAM_ADDR should be somewhere that won't interfere
with your processor/board/system design. The default value
you will find in any recent u-boot distribution in
- Walnut405.h should work for you. I'd set it to a value larger
+ walnut.h should work for you. I'd set it to a value larger
than your SDRAM module. If you have a 64MB SDRAM module, set
it above 400_0000. Just make sure your board has no resources
that are supposed to respond to that address! That code in
establish some rules. Submissions which do not conform to these rules
may be rejected, even when they contain important and valuable stuff.
+Patches shall be sent to the u-boot-users mailing list.
When you send a patch, please include the following information with
it:
(using #ifdef), and the resulting code with the new feature
disabled must not need more memory than the old code without your
modification.
+
+* Remember that there is a size limit of 40 kB per message on the
+ u-boot-users mailing list. Compression may help.