Software Configuration:
=======================
-Configuration is usually done using C preprocessor defines; the
-rationale behind that is to avoid dead code whenever possible.
-
-There are two classes of configuration variables:
-
-* Configuration _OPTIONS_:
- These are selectable by the user and have names beginning with
- "CONFIG_".
-
-* Configuration _SETTINGS_:
- These depend on the hardware etc. and should not be meddled with if
- you don't know what you're doing; they have names beginning with
- "CONFIG_SYS_".
-
-Previously, all configuration was done by hand, which involved creating
-symbolic links and editing configuration files manually. More recently,
-U-Boot has added the Kbuild infrastructure used by the Linux kernel,
-allowing you to use the "make menuconfig" command to configure your
-build.
-
-
Selection of Processor Architecture and Board Type:
---------------------------------------------------
In this mode, a single differential clock is used to supply
clocks to the sysclock, ddrclock and usbclock.
- CONFIG_SYS_CPC_REINIT_F
- This CONFIG is defined when the CPC is configured as SRAM at the
- time of U-Boot entry and is required to be re-initialized.
-
- Generic CPU options:
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
the appropriate value in Hz.
- MMC Support:
- The MMC controller on the Intel PXA is supported. To
- enable this define CONFIG_MMC. The MMC can be
- accessed from the boot prompt by mapping the device
- to physical memory similar to flash. Command line is
- enabled with CONFIG_CMD_MMC. The MMC driver also works with
- the FAT fs. This is enabled with CONFIG_CMD_FAT.
-
CONFIG_SH_MMCIF
Support for Renesas on-chip MMCIF controller
Enables support for FPGA family.
(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
- CONFIG_SYS_FPGA_PROG_FEEDBACK
-
- Enable printing of hash marks during FPGA configuration.
-
CONFIG_SYS_FPGA_CHECK_BUSY
Enable checks on FPGA configuration interface busy
If defined, a function that provides delays in the FPGA
configuration driver.
- CONFIG_SYS_FPGA_CHECK_CTRLC
- Allow Control-C to interrupt FPGA configuration
-
CONFIG_SYS_FPGA_CHECK_ERROR
Check for configuration errors during FPGA bitfile
overwriting the architecture dependent default
settings.
-- Frame Buffer Address:
- CONFIG_FB_ADDR
-
- Define CONFIG_FB_ADDR if you want to use specific
- address for frame buffer. This is typically the case
- when using a graphics controller has separate video
- memory. U-Boot will then place the frame buffer at
- the given address instead of dynamically reserving it
- in system RAM by calling lcd_setmem(), which grabs
- the memory for the frame buffer depending on the
- configured panel size.
-
- Please see board_init_f function.
-
- Automatic software updates via TFTP server
CONFIG_UPDATE_TFTP
CONFIG_UPDATE_TFTP_CNT_MAX
Non-cached memory is only supported on 32-bit ARM at present.
-- CONFIG_SYS_BOOTM_LEN:
- Normally compressed uImages are limited to an
- uncompressed size of 8 MBytes. If this is not enough,
- you can define CONFIG_SYS_BOOTM_LEN in your board config file
- to adjust this setting to your needs.
-
- CONFIG_SYS_BOOTMAPSZ:
Maximum size of memory mapped by the startup code of
the Linux kernel; all data that must be processed by
CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
then the value in "bootm_size" will be used instead.
-- CONFIG_SYS_BOOT_RAMDISK_HIGH:
- Enable initrd_high functionality. If defined then the
- initrd_high feature is enabled and the bootm ramdisk subcommand
- is enabled.
-
- CONFIG_SYS_BOOT_GET_CMDLINE:
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
one, specify here. Note that the value must resolve
to something your driver can deal with.
-- CONFIG_SYS_DDR_RAW_TIMING
- Get DDR timing information from other than SPD. Common with
- soldered DDR chips onboard without SPD. DDR raw timing
- parameters are extracted from datasheet and hard-coded into
- header files or board specific files.
-
- CONFIG_FSL_DDR_INTERACTIVE
Enable interactive DDR debugging. See doc/README.fsl-ddr.
- CONFIG_FSL_DDR_BIST
Enable built-in memory test for Freescale DDR controllers.
-- CONFIG_SYS_83XX_DDR_USES_CS0
- Only for 83xx systems. If specified, then DDR should
- be configured using CS0 and CS1 instead of CS2 and CS3.
-
- CONFIG_RMII
Enable RMII mode for all FECs.
Note that this is a global option, we can't
projects / platform / kernel / u-boot.git / blobdiff