driver/ddr: Change Freescale ARM DDR driver to support both big and little endian

[platform/kernel/u-boot.git] / README

diff --git a/README b/README
index 6668631..413d682 100644 (file)
--- a/README
+++ b/README
@@ -486,6 +486,12 @@ The following options need to be configured:
                PBI commands can be used to configure SoC before it starts the execution.
                Please refer doc/README.pblimage for more details
 
+               CONFIG_SYS_FSL_DDR_BE
+               Defines the DDR controller register space as Big Endian
+
+               CONFIG_SYS_FSL_DDR_LE
+               Defines the DDR controller register space as Little Endian
+
 - Intel Monahans options:
                CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO