fpga: ACEX1K: Use logging feature instead of FPGA_DEBUG

[platform/kernel/u-boot.git] / README

diff --git a/README b/README
index 05c8414..186f1f9 100644 (file)
--- a/README
+++ b/README
@@ -294,17 +294,6 @@ The following options need to be configured:
                the "64" category of the Power ISA). This is necessary for ePAPR
                compliance, among other possible reasons.
 
-               CONFIG_SYS_FSL_TBCLK_DIV
-
-               Defines the core time base clock divider ratio compared to the
-               system clock.  On most PQ3 devices this is 8, on newer QorIQ
-               devices it can be 16 or 32.  The ratio varies from SoC to Soc.
-
-               CONFIG_SYS_FSL_PCIE_COMPAT
-
-               Defines the string to utilize when trying to match PCIe device
-               tree nodes for the given platform.
-
                CONFIG_SYS_FSL_ERRATUM_A004510
 
                Enables a workaround for erratum A004510.  If set,
@@ -426,8 +415,6 @@ The following options need to be configured:
                the defaults discussed just above.
 
 - Cache Configuration for ARM:
-               CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
-                                     controller
                CONFIG_SYS_PL310_BASE - Physical base address of PL310
                                        controller register space
 
@@ -576,20 +563,6 @@ The following options need to be configured:
                        CONFIG_LAN91C96_USE_32_BIT
                        Define this to enable 32 bit addressing
 
-               CONFIG_SMC91111
-               Support for SMSC's LAN91C111 chip
-
-                       CONFIG_SMC91111_BASE
-                       Define this to hold the physical address
-                       of the device (I/O space)
-
-                       CONFIG_SMC_USE_32_BIT
-                       Define this if data bus is 32 bits
-
-                       CONFIG_SMC_USE_IOFUNCS
-                       Define this to use i/o functions instead of macros
-                       (some hardware wont work with macros)
-
                        CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
                        Define this if you have more then 3 PHYs.