serial: bcm6345: switch to raw I/O functions

[platform/kernel/u-boot.git] / README

diff --git a/README b/README
index 35305a6..17d56b8 100644 (file)
--- a/README
+++ b/README
@@ -528,25 +528,6 @@ The following options need to be configured:
                pointer. This is needed for the temporary stack before
                relocation.
 
-               CONFIG_SYS_MIPS_CACHE_MODE
-
-               Cache operation mode for the MIPS CPU.
-               See also arch/mips/include/asm/mipsregs.h.
-               Possible values are:
-                       CONF_CM_CACHABLE_NO_WA
-                       CONF_CM_CACHABLE_WA
-                       CONF_CM_UNCACHED
-                       CONF_CM_CACHABLE_NONCOHERENT
-                       CONF_CM_CACHABLE_CE
-                       CONF_CM_CACHABLE_COW
-                       CONF_CM_CACHABLE_CUW
-                       CONF_CM_CACHABLE_ACCELERATED
-
-               CONFIG_SYS_XWAY_EBU_BOOTCFG
-
-               Special option for Lantiq XWAY SoCs for booting from NOR flash.
-               See also arch/mips/cpu/mips32/start.S.
-
                CONFIG_XWAY_SWAP_BYTES
 
                Enable compilation of tools/xway-swap-bytes needed for Lantiq
@@ -1951,14 +1932,6 @@ The following options need to be configured:
                SPI configuration items (port pins to use, etc). For
                an example, see include/configs/sacsng.h.
 
-               CONFIG_HARD_SPI
-
-               Enables a hardware SPI driver for general-purpose reads
-               and writes.  As with CONFIG_SOFT_SPI, the board configuration
-               must define a list of chip-select function pointers.
-               Currently supported on some MPC8xxx processors.  For an
-               example, see include/configs/mpc8349emds.h.
-
                CONFIG_SYS_SPI_MXC_WAIT
                Timeout for waiting until spi transfer completed.
                default: (CONFIG_SYS_HZ/100)     /* 10 ms */