ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
+ALL-$(CONFIG_RAMBOOT_PBL) += $(obj)u-boot.pbl
ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
ALL-$(CONFIG_SPL_FRAMEWORK) += $(obj)u-boot.img
ALL-$(CONFIG_TPL) += $(obj)tpl/u-boot-tpl.bin
endif
endif
+build := -f $(TOPDIR)/scripts/Makefile.build -C
+
all: $(ALL-y) $(SUBDIR_EXAMPLES)
$(obj)u-boot.dtb: checkdtc $(obj)u-boot
-d $< $@
$(obj)u-boot.imx: $(obj)u-boot.bin depend
- $(MAKE) -C $(SRCTREE)/arch/arm/imx-common $(OBJTREE)/u-boot.imx
+ $(MAKE) $(build) $(SRCTREE)/arch/arm/imx-common $(OBJTREE)/u-boot.imx
$(obj)u-boot.kwb: $(obj)u-boot.bin
$(obj)tools/mkimage -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \
$(call SPL_PAD_APPEND,$<,$(obj)u-boot.bin,tpl/u-boot-tpl-pad.bin,$(CONFIG_TPL_PAD_TO))
$(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
- $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+ $(MAKE) $(build) $(SRCTREE)/arch/arm/imx-common \
$(OBJTREE)/u-boot-with-spl.imx
$(obj)u-boot-with-nand-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
- $(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+ $(MAKE) $(build) $(SRCTREE)/arch/arm/imx-common \
$(OBJTREE)/u-boot-with-nand-spl.imx
$(obj)u-boot.ubl: $(obj)u-boot-with-spl.bin
$(GEN_UBOOT) $(obj)common/system_map.o
endif
+# Tentative step for Kbuild-style makefiles coexist with conventional U-Boot style makefiles
+# U-Boot conventional sub makefiles always include some other makefiles.
+# So, the build system searches a line beginning with "include" before entering into the sub makefile
+# in order to distinguish which style it is.
+# If the Makefile include a "include" line, we assume it is an U-Boot style makefile.
+# Otherwise, it is treated as a Kbuild-style makefile.
+select_makefile = \
+ +if grep -q "^include" $1/Makefile; then \
+ $(MAKE) -C $1; \
+ else \
+ $(MAKE) -C $1 -f $(TOPDIR)/scripts/Makefile.build; \
+ mv $(dir $@)built-in.o $@; \
+ fi
+
+# We do not need to build $(OBJS) explicitly.
+# It is built while we are at $(CPUDIR)/lib$(CPU).o build.
$(OBJS): depend
- $(MAKE) -C $(CPUDIR) $(if $(REMOTE_BUILD),$@,$(notdir $@))
+ if grep -q "^include" $(CPUDIR)/Makefile; then \
+ $(MAKE) -C $(CPUDIR) $(if $(REMOTE_BUILD),$@,$(notdir $@)); \
+ fi
$(LIBS): depend $(SUBDIR_TOOLS)
- $(MAKE) -C $(dir $(subst $(obj),,$@))
+ +$(call select_makefile, $(dir $(subst $(obj),,$@)))
$(LIBBOARD): depend $(LIBS)
- $(MAKE) -C $(dir $(subst $(obj),,$@))
+ +$(call select_makefile, $(dir $(subst $(obj),,$@)))
$(SUBDIRS): depend
$(MAKE) -C $@ all
updater:
$(MAKE) -C tools/updater all
+select_makefile2 = \
+ if grep -q "^include" $1/Makefile; then \
+ $(MAKE) -C $1 _depend; \
+ else \
+ $(MAKE) -C $1 -f $(TOPDIR)/scripts/Makefile.build _depend; \
+ fi
+
# Explicitly make _depend in subdirs containing multiple targets to prevent
# parallel sub-makes creating .depend files simultaneously.
depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE) \
$(obj)include/autoconf.mk \
$(obj)include/generated/generic-asm-offsets.h \
$(obj)include/generated/asm-offsets.h
- for dir in $(SUBDIRS) $(CPUDIR) $(LDSCRIPT_MAKEFILE_DIR) ; do \
- $(MAKE) -C $$dir _depend ; done
+ +for dir in $(SUBDIRS) $(CPUDIR) $(LDSCRIPT_MAKEFILE_DIR) ; do \
+ $(call select_makefile2, $$dir); \
+ done
TAG_SUBDIRS = $(SUBDIRS)
TAG_SUBDIRS += $(dir $(__LIBS))