+commit 2dc64451b4c08ffd619372abfdc2506a2e2363b9
+Author: Igor Lisitsin <igor@emcraft.com>
+Date: Wed Apr 18 14:55:19 2007 +0400
+
+ Adapt log buffer code to support Linux 2.6
+
+ A new environment variable, "logversion", selects the log buffer
+ behaviour. If it is not set or set to a value other than 2, then the
+ old, Linux 2.4.4, behaviour is selected.
+
+ Signed-off-by: Igor Lisitsin <igor@emcraft.com>
+ --
+
+commit a11e06965ec91270c51853407ff1261d3c740386
+Author: Igor Lisitsin <igor@emcraft.com>
+Date: Wed Mar 28 19:06:19 2007 +0400
+
+ Extend POST support for PPC440
+
+ Added memory, CPU, UART, I2C and SPR POST tests for PPC440.
+
+ Signed-off-by: Igor Lisitsin <igor@emcraft.com>
+ --
+
+commit 02032e8f14751a1a751b09240a4f1cf9f8a2077f
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Fri Jun 22 14:58:04 2007 +0200
+
+ [ppc] Fix build breakage for all non-4xx PowerPC variants.
+
+ - adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
+ - minor 4xx cleanup
+
+commit 83b4cfa3d629dff0264366263c5e94d9a50ad80b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jun 20 18:14:24 2007 +0200
+
+ Coding style cleanup. Refresh CHANGELOG.
+
+commit b3f9ec86e388207fd03dcdf7b145b9ed080bf024
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jun 19 17:22:44 2007 +0200
+
+ ppc4xx: Add bootstrap command for AMCC Sequoia (440EPx) eval board
+
+ This patch adds a board command to configure the I2C bootstrap EEPROM
+ values. Right now 533 and 667MHz are supported for booting either via NOR
+ or NAND FLASH. Here the usage:
+
+ => bootstrap 533 nor ;to configure the board for 533MHz NOR booting
+ => bootstrap 667 nand ;to configure the board for 667MHz NNAND booting
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit df8a24cdd30151505cf57bbee5289e91bf53bd1b
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jun 19 16:42:31 2007 +0200
+
+ [ppc4xx] Fix problem with NAND booting on AMCC Acadia
+
+ The latest changes showed a problem with the location of the NAND-SPL
+ image in the OCM and the init-data area (incl. cache). This patch
+ fixes this problem.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 86ba99e34194394052d24c04dc40d1263d29a26f
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jun 19 16:40:58 2007 +0200
+
+ [ppc4xx] Change board/amcc/acadia/cpr.c to pll.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e73846b7cf1e29ae635bf9bb5570269663df2ee5
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 15 11:33:41 2007 +0200
+
+ [ppc4xx] Change lwmon5 port to work with recent 440 exception rework
+
+ Now CONFIG_440 has to be defined in all PPC440 board config files.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit efa35cf12d914d4caba942acd5a6c45f217de302
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Jun 15 11:19:28 2007 +0200
+
+ ppc4xx: Clean up 440 exceptions handling
+
+ - Introduced dedicated switches for building 440 and 405 images required
+ for 440-specific machine instructions like 'rfmci' etc.
+
+ - Exception vectors moved to the proper location (_start moved away from
+ the critical exception handler space, which it occupied)
+
+ - CriticalInput now serviced (with default handler)
+
+ - MachineCheck properly serviced (added a dedicated handler and return
+ subroutine)
+
+ - Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
+ unhandled and those not relevant for 4xx were eliminated)
+
+ - Eliminated Linux leftovers, removed dead code
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b765ffb773f5a3cd5aa94ec76b6a05276b8cd5b2
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 15 08:18:01 2007 +0200
+
+ [ppc4xx] Add initial lwmon5 board support
+
+ This patch adds initial support for the Liebherr lwmon5 board euqipped
+ with an AMCC 440EPx PowerPC.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 85f737376d5ff3d5f0d45a8b657686326d175307
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 15 07:39:43 2007 +0200
+
+ [ppc4xx] Extend 44x GPIO setup with default output state
+
+ The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup
+ is extended with the default GPIO output state (level).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit dbca208518e5e7f01a6420588d1cd6e60db74c2b
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jun 14 11:14:32 2007 +0200
+
+ [ppc4xx] Extend program_tlb() with virtual & physical addresses
+
+ Now program_tlb() allows to program a TLB (or multiple) with
+ different virtual and physical addresses. With this change, now one
+ physical region (e.g. SDRAM) can be mapped 2 times, once with caches
+ diabled and once with caches enabled.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9912121f7ed804ea58fd62f3f230b5dcfc357d88
+Author: Detlev Zundel <dzu@denx.de>
+Date: Wed May 23 19:02:41 2007 +0200
+
+ Change 'repeatable' attribute of some commands to sensible values.
+
+ Most prominently this changes 'erase' to be non-repeatable.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 5afb202093f6a001797db92cf695b93a70ea9ab4
+Author: Detlev Zundel <dzu@denx.de>
+Date: Wed May 23 18:47:48 2007 +0200
+
+ Fix 'run' not to continue after interrupted command
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 8f8416fada9faf94b9a92f21fe6000643cb521d5
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Fri Jun 8 14:52:22 2007 +0200
+
+ TQM5200: Add Flat Device Tree support, update default env. accordingly.
+
+ Signed-off-by: Jan Wrobel <wrr@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 9045f33c023f698660a2e45d1b2194c0711abebc
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jun 8 10:24:58 2007 +0200
+
+ Fix config problems on SC3 board; make ide_reset_timeout work.
+
+commit fba3fb0449b8a54542aed1e729de76e7f5a2ff1b
+Author: Benoît Monin <bmonin@adeneo.eu>
+Date: Fri Jun 8 09:55:24 2007 +0200
+
+ [PATCH] fix gpio setting when using CFG_440_GPIO_TABLE
+
+ Set the correct value in GPIOx_TCR when configuring the gpio
+ with CFG_440_GPIO_TABLE.
+
+ Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 725671ccd2cd04c9ebc50c9e5a94dd8cbade66b7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jun 6 16:26:56 2007 +0200
+
+ Coding Style cleanup; generate new CHANGELOG file.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c440bfe6d6d92d66478a7e84402b31f48413617b
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jun 6 11:42:13 2007 +0200
+
+ ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval board
+
+ This patch adds NAND booting support for the AMCC Acadia eval board.
+
+ Please make sure to configure jumper J7 to position 2-3 when booting
+ from NOR, and to position 1-2 when booting for NAND.
+
+ I also added a board command to configure the I2C bootstrap EEPROM
+ values. Right now only 267MHz is support for booting either via NOR
+ or NAND FLASH. Here the usage:
+
+ => bootstrap 267 nor ;to configure the board for 267MHz NOR booting
+ => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 32922cdc470fdfd39bea0c1c4f582d3fb340421e
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue Jun 5 12:30:52 2007 -0500
+
+ mpc8641 image size cleanup
+
+ e600 does not have a bootpg restriction.
+ Move the version string to beginning of image at fff00000.
+ Resetvec.S is not needed.
+ Update flash copy instructions.
+ Add tftpflash env variable
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit e3cbe1f93c5722f8ebbad468e30c069a2b511097
+Author: Benoît Monin <bmonin@adeneo.eu>
+Date: Mon Jun 4 08:36:05 2007 +0200
+
+ [PATCH] Fix ppc4xx bootstrap letter displayed on startup
+
+ The attached patch is mainly cosmetic, allowing u-boot to
+ display the correct bootstrap option letter according to the
+ datasheets.
+
+ The original patch was extended with 405EZ support by Stefan
+ Roese.
+
+ Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 18d156eb37c90fadc8ec7a81a3b89176161f85b7
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 16:18:17 2007 +0200
+
+ ppc4xx: Add missing file for Bamboo NAND booting support
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 155a96478a0881e6da96cbbbcf34952d6a3b1b4b
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:58:19 2007 +0200
+
+ ppc4xx: Undo Sequoia patch for dynamic EBC speed support of 83MHz
+
+ This patch undoes the patch by Jeff Mann with commit-id ada4697d. As
+ suggested by AMCC it is not recommended to dynamically change the EBC
+ speed after bootup. So we undo this change to be on the safe side.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9d9096043e8f713d4bf1743d32e1459e6a11644b
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:29:04 2007 +0200
+
+ ppc4xx: Update Sequoia NAND booting support with ECC
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cf959c7d6687567c308e366e9581e1a5aff5cc5b
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:27:11 2007 +0200
+
+ ppc4xx: Add NAND booting support for AMCC Bamboo (440EP) eval board
+
+ This patch adds NAND booting support for the AMCC Bamboo eval board.
+ Since the NAND-SPL boot image is limited to 4kbytes, this version
+ only supports the onboard 64MBytes of DDR. The DIMM modules can't be
+ supported, since the setup code for I2C DIMM autodetection and
+ configuration is too big for this NAND bootloader.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 42be56f53c8b107868e6125c8524ae84293e95a7
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:23:04 2007 +0200
+
+ NAND: Add ECC support to NAND booting support in nand_spl/nand_boot.c
+
+ The U-Boot NAND booting support is now extended to support ECC
+ upon loading of the NAND U-Boot image.
+
+ Tested on AMCC Sequoia (440EPx) and Bamboo (440EP).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a471db07fbb65a841ffc9f4f112562b945230f98
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:19:29 2007 +0200
+
+ ppc4xx: Prepare Bamboo port for NAND booting support
+
+ This patch updates the "normal" Bamboo NOR booting port, so
+ that it is compatible with the coming soon NAND booting
+ Bamboo port.
+
+ It also enables the 2nd NAND flash on the Bamboo.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 53ad02103fb8be4138a9937a8ab91fcdff7b4987
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:16:58 2007 +0200
+
+ ppc4xx: Update in_be32() functions and friends to latest Linux version
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 91da09cfbce0c1de05d6d84aa8363d666fa7ea3c
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:15:12 2007 +0200
+
+ NAND: Add hardware ECC support to the PPC4xx NAND driver ndfc.c
+
+ This patch adds hardware ECC support to the NDFC driver. It also
+ changes the register access from using the "simple" in32/out32
+ functions to the in_be32/out_be32 functions, which make sure
+ that the access is correctly synced. This is the only recommended
+ access to SoC registers in the current Linux kernel.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 17b5e862287cca76f19dcf8b741e61a7d06617f2
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:12:15 2007 +0200
+
+ NAND: Update nand_ecc.c to latest Linux version
+
+ This patch updates the nand_ecc code to the latest Linux version.
+ The main reason for this is the more compact code. This makes
+ it possible to include the ECC code into the NAND bootloader
+ image (NAND_SPL) for PPC4xx.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d2d432760d2199d0e8558fdd9d1789b8131abcf7
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:09:50 2007 +0200
+
+ ppc4xx: 44x DDR driver code cleanup and small fix for Bamboo
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e4bbed2803a2ad0521c7362f5d3e065f99abaedc
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 13:45:24 2007 +0200
+
+ ppc4xx: Change Luan config file to support ECC
+
+ With the updated 44x DDR2 driver the Luan board now supports
+ ECC generation and checking.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7187db73491c8de0fb56efb5e5134ba5ec443089
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 13:45:00 2007 +0200
+
+ ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
+
+ Add config option for 180 degree advance clock control as needed
+ for the AMCC Luan eval board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ee1529838abbfaa35f14e3ffbeaaba693159475f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu May 31 17:20:09 2007 +0200
+
+ Add support for STX GP3SSA (stxssa) Board with 4 MiB flash.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 7049288fb1f16f1b317140226cdebd07bd416395
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:26:46 2007 +0200
+
+ Motion-PRO: Code cleanup, fix of a typo in OF_STDOUT_PATH.
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 4520fd4d2c450da49637216aa0e53739b61c60ac
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:06:36 2007 +0200
+
+ Motion-PRO: Add support for redundant environment.
+
+ Enable redundant environment, add a MTD partition for it; also add env.
+ variable command for passing MTD partitions to the kernel command line.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit a26eabeec31746f06d309103690892805696e344
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:05:11 2007 +0200
+
+ Motion-PRO: Change maximum console buffer size from 256 to 1024 bytes.
+
+ Allow passing longer command line to the kernel - useful especially
+ for passing MTD partition layout.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 9160b96f71483a116de81c68985e8ee306d36764
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:04:18 2007 +0200
+
+ Fix: Add missing NULL termination in strings expanded by macros parser.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 630ec84aef7228fc1dbfb38dec78541403a786cd
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:03:37 2007 +0200
+
+ Motion-PRO: Update EEPROM's page write bits and write delay.
+
+ Change EEPROM configuration according to the datasheet: "The 24C01A and 24C02A
+ have a page write capability of two bytes", and "This device offers fast (1ms)
+ byte write". Add 3ms of extra delay.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit c00125e07c1ebc125bab40e1e18bceed8be0c162
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:58:45 2007 +0200
+
+ MPC5XXX, Motion-PRO: Fix PHY initialization problem.
+
+ After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which
+ networking does not function. This commit switches PHY to TX mode by clearing
+ the FX_SEL bit of Mode Control Register. It also reverses commit
+ 008861a2f3ef2c062744d733787c7e530a1b8761, i.e., a temporary workaround.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 93b78f534a6e708b4cf1a4ffb4d8438c67a007db
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:57:15 2007 +0200
+
+ Motion-PRO: Add support for the temperature sensor.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit c75e639630cc132dc19cd1ecda5922c0db0bfbba
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:55:23 2007 +0200
+
+ Motion-PRO: Add displaying of CPLD revision information during boot.
+
+ Signed-off-by: Jan Wrobel <wrr@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit c99512d6bd3973f01ca2fc4896d829b46e68f150
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:53:43 2007 +0200
+
+ MPC5xxx: Change names of defines related to IPB and PCI clocks.
+
+ Both CFG_PCISPEED_66 and CFG_IPBSPEED_133 are misnamed, as defining
+ them does not cause PCI or IPB clocks to run at the specified speed.
+ Instead, they configure divisors used to calculate said clocks. This
+ patch renames the defines according to their real function.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit a11c0b85dc3664bb3c1e781137118730c8f619ab
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:51:48 2007 +0200
+
+ Motion-PRO: Add LED support.
+
+ Signed-off-by: Jan Wrobel <wrr@semihalf.com>
+ Signed-off-by: Marian Balakowicz <m8@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit d756894722c888d09a9fa1df8323753772d3dcce
+Author: Stefan Roese <sr@denx.de>
+Date: Thu May 24 09:49:00 2007 +0200
+
+ ppc4xx: Fix small 405EZ OCM initilization bug in start.S
+
+ As pointed out by Bruce Adler <bruce.adler@acm.org> this patch
+ fixes a small bug in the 405EZ OCM initialization. Thanks for
+ spotting.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5d4a179013d59a76446462e1eb0a969fba63eb81
+Author: Stefan Roese <sr@denx.de>
+Date: Thu May 24 08:22:09 2007 +0200
+
+ ppc4xx: Update AMCC Acadia support for board revision 1.1
+
+ This patch updates the Acadia (405EZ) support for the new 1.1 board
+ revision. It also adds support for NAND FLASH via the 4xx NDFC.
+
+ Please note that the jumper J7 must be in position 2-3 for this
+ NAND support. Position 1-2 is for NAND booting only. NAND booting
+ support will follow later.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9f0077abd69f7a7c756a915b961037302be3e6f2
+Author: Stefan Roese <sr@denx.de>
+Date: Tue May 22 12:48:09 2007 +0200
+
+ ppc4xx: Use do { ... } while (0) for CPR & SDR access macros
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6f3dfc139a838b0841c151efe00ad47db2366e79
+Author: Stefan Roese <sr@denx.de>
+Date: Tue May 22 12:46:10 2007 +0200
+
+ ppc4xx: Add 405 support to 4xx NAND driver ndfc.c
+
+ This patch adds support for 405 PPC's to the 4xx NAND driver
+ ndfc.c. This is in preparation for the new AMCC 405EZ.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 10603d76767426be803dadd4fb688b97eb69481c
+Author: Stefan Roese <sr@denx.de>
+Date: Mon May 21 07:41:22 2007 +0200
+
+ ppc4xx: Fix problem in 405EZ OCM initialization
+
+ As spotted by Bruce Adler this patch fixes an initialization problem
+ for the 405EZ OCM.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3e3b956906eba9e4ad7931581ecedaad10eccce8
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Fri May 18 16:47:03 2007 +0100
+
+ Reduce line lengths to 80 characters max.
+
+commit 93ef45c9ddfdd9fc17c4e74bd8e2f2456580eb72
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Fri May 18 14:34:07 2007 +0100
+
+ Makefile permissions
+
+commit 1443a31457d68f7e8f0b9403e9832ec1e79dc59d
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Fri May 18 14:33:11 2007 +0100
+
+ Makefile permissions
+
+commit 70124c2602ae2d4c5d3dba05b482d91548242de8
+Author: Stefano Babic <sbabic@denx.de>
+Date: Wed May 16 14:49:12 2007 +0200
+
+ Fix compile problem cause my Microblaze merge
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit ada4697d0230d6da552867777f98a67ec3ba2579
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Wed May 16 13:23:10 2007 +0200
+
+ [PATCH] Run new sequoia boards with an EBC speed of 83MHz
+
+ Because the Sequoia board does not boot with an EBC faster than 66MHz,
+ the clock divider are changed after the initial boot process.
+
+ This allows for maximum clocking speeds to be achieved on newer boards.
+ Sequoia boards with 666.66 MHz processors require that the EBC divider
+ be set to 3 in order to start the initial boot process at a slower EBC
+ speed. After the initial boot process, the divider can be set back to 2,
+ which will cause the boards to run at 83.333MHz. This is backward
+ compatible with boards with 533.33 MHz processors, as these boards will
+ already be set with an EBC divider of 2.
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+
+commit a7676ea7732f3c596805079fed7e5c9fac652cfc
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed May 16 01:16:53 2007 +0200
+
+ Minor Coding Style cleanup, update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d62f64cc23a940eafe712c776b3249e4160753d1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed May 16 00:13:33 2007 +0200
+
+ Coding Style Cleanup, new CHANGELOG
+
+commit 61936667e86a250ae12fd2dc189d3588f0a59e0b
+Author: Stefan Roese <sr@denx.de>
+Date: Fri May 11 12:01:49 2007 +0200
+
+ ppc4xx: Add mtcpr/mfcpr access macros
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 343c48bd84606c4025c8a7c7263fda465d6e284c
+Author: Stefan Roese <sr@denx.de>
+Date: Fri May 11 12:01:06 2007 +0200
+
+ ppc4xx: Set bd->bi_pci_busfreq on 440EPx/GRx too
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7d98ba770a7eaefa29ce927f31a0956df85bf650
+Author: Piotr Kruszynski <ppk@semihalf.com>
+Date: Thu May 10 16:55:52 2007 +0200
+
+ [Motion-PRO] Add MTD and JFFS2 support, also add default partition
+ definition.
+
+commit 65fb6a676e821f9570a2a376dc204bf611ce5f81
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 11:42:44 2007 +0100
+
+ Add the board directory for SMN42
+
+commit 160131bf965785419626df6c388729fe0b597992
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 11:41:58 2007 +0100
+
+ Add the files for the SMN42 board
+
+commit 5c6d2b5a500f8c49670de8910150b78a41f781fc
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 11:40:34 2007 +0100
+
+ Remove the deleted files for the SMN42 patch
+
+commit b0d8f5bf0d215adc9424cb228b2484dbf07f7761
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 11:37:56 2007 +0100
+
+ New board SMN42 branch
+
+commit 29f3be0caf0799ca6b89dfd9824c15619a50000f
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 10:24:38 2007 +0100
+
+ Makefile permissions
+
+commit b84289b595731e8851df46e893845cc1322c9b9b
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue May 8 14:17:07 2007 -0500
+
+ 8641hpcn: Fix Makefile after moving pixis to board/freescale.
+
+ The OBJTREE != SRCTREE build scenario was broken.
+ This fixes it.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit e69f66c6ebe82bbbd1da766bc4eda40ec7ee5af1
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue May 8 15:57:43 2007 +0200
+
+ add: reading special purpose registers
+
+commit 1a50f164beb065f360fbddb76029607d6b099698
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue May 8 14:52:52 2007 +0200
+
+ add: Microblaze V5 exception handling
+
+commit ab874d5047e5d30dbc1e517ff26083efffa98ecb
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue May 8 14:39:11 2007 +0200
+
+ add: FSL control read and write
+
+commit de1de02a7cbf05e6b63e0d8ffc624f12493f6ba3
+Author: Piotr Kruszynski <ppk@semihalf.com>
+Date: Tue May 8 13:05:44 2007 +0200
+
+ [Motion-PRO] Add support for I2C, EEPROM and RTC.
+
+commit fa5c2ba123b1bf88455bfc21db5e786ca045029d
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue May 8 10:23:56 2007 +0200
+
+ [Motion-PRO] Add ATA support. Add CF-booting commands to the default
+ environment.
+
+commit 06241d50a3ab1b20a0b08baeeaffcaa23ae4b839
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue May 8 09:39:12 2007 +0200
+
+ [Motion-PRO] Change IPB clock frequency from 50MHz to 100MHz. This
+ eliminates networking problems in Linux (timeouts).
+
+commit 1f1369c34b629be94702684d41d3fddf0f6193e7
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue May 8 09:21:57 2007 +0200
+
+ [Motion-PRO] Enable Flat Device Tree support and modify default environment
+ to allow booting of FDT-expecting kernels.
+
+commit fb05f6da35ea1c15c553abe6f23f656bf18dc5db
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 23:58:31 2007 +0200
+
+ new: USE_MSR_INTR support
+
+commit 008861a2f3ef2c062744d733787c7e530a1b8761
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Mon May 7 22:36:15 2007 +0200
+
+ [MPC5xxx] There are networking problems on the Motion-PRO board with
+ current PHY initalization code (tftp timeouts all the time). This commit
+ temporarily disables PHY initalization sequence to make the networking
+ operational, until a fix is found.
+
+commit abca901869c3760b6c5fecb825db6c1d91a78a93
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon May 7 22:10:36 2007 +0200
+
+ Get rid of duplicated file (see include/configs/sbc8560.h instead)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 207b7b2c9d9752e0f6478c30c29b7087f6e6cbb6
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon May 7 22:07:08 2007 +0200
+
+ Get rid of duplicated file (see doc/README.SBC8560 instead)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a7bac7e9b57ba948051beb19ec5be3a75ce75383
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:43:10 2007 +0200
+
+ fix: read and write MSR - repair number of parameters
+
+commit 193b4a3bb3acaddf798da8de0da05d94ba8774ee
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Mon May 7 19:42:49 2007 +0200
+
+ [PATCH] ppc4xx: Fix CONFIG_SYS_CLK_FREQ definition in Sequoia config file
+
+ A '3' got cut off in the formatting of the last patch to automatically
+ change the clock speed of the system clock on sequoia board.
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 19bf1fbad7f19d5a120be9b1daf136e052fcab39
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:33:51 2007 +0200
+
+ new: fsl interrupt support
+ FSL_Has_data is connected to INTC.
+
+commit 792032baa7d625e34c981ab6df521911bd8dc861
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:30:12 2007 +0200
+
+ fix: interrupt handler
+ remove asm code
+
+commit f3f001a341ef185d0f13841be5b5dc3395aacc31
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:25:08 2007 +0200
+
+ fix: remove asm code
+
+commit fb7c2dbef02c9f6f8d7b04ec4c2bfb91418b9c01
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:12:43 2007 +0200
+
+ fix: clean interrupt
+
+commit 42efed6130c8fcf7da881385b5427065d2801757
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 17:22:25 2007 +0200
+
+ fix: interrupt handler for multiple sources
+
+commit 48fbd3a4cdabbebc1debd7eed73c00c2caf914f6
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 17:11:09 2007 +0200
+
+ new: add writing to msr register
+
+commit ac4cd59d59c9bf3f89cb7a344abf8184d678f562
+Author: Timur Tabi <timur@freescale.com>
+Date: Sat May 5 08:12:30 2007 +0200
+
+ 5xxx: write MAC address to mac-address and local-mac-address
+
+ Some device trees have a mac-address property, some have local-mac-address,
+ and some have both. To support all of these device trees, ftp_cpu_setup()
+ should write the MAC address to mac-address and local-mac-address, if they
+ exist.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit a9d87e2707dcb249f6bb7f7ff7e00acd8cda9fd2
+Author: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
+Date: Sun Apr 29 14:01:54 2007 +0200
+
+ [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message
+
+ MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
+ message. Use PVR to distinguish between the two variants, and print proper CPU
+ information.
+
+ Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 4ec5bd55ed1ffa91a774af298769621f4fbb18c1
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Wed Apr 25 16:01:26 2007 +0200
+
+ [PATCH] simplify silent console
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit b7598a43f2b421a713d8135e98a42c37d9eb9df0
+Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+Date: Mon Apr 23 15:30:39 2007 +0200
+
+ [PATCH] Avoid assigning PCI resources from zero address
+
+ If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
+ core complains and IDE drivers fails to work. Also, assigning zero to a BAR
+ was illegal according to PCI 2.1 (the later revisions seem to have excluded the
+ sentence about "0" being considered an invalid address) -- so, use a reasonable
+ starting value of 0x1000 (that's what the most Linux archs are using).
+
+ Alternatively, one might have fixed the calls to pci_set_region() individually
+ (some code even seems to have taken care of this issue) but that would have
+ been a lot more work. :-)
+
+ Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 9ffd451afeb08e5be7ddae680487ec962b2bca25
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Mon Apr 23 14:00:11 2007 +0200
+
+ [patch] setenv(...) can delete environmentalvariables
+
+ update setenv() function so that entering a NULL value for the
+ variable's value will delete the environmental variable
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit ebd0a0ae05a44769c4e27458ad4e9f3438250443
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Apr 23 13:54:24 2007 +0200
+
+ [patch] use unsigned char in smc91111 driver for mac
+
+ the v_mac variable in the smc91111 driver is declared as a signed char ...
+ this causes problems when one of the bytes in the MAC is "signed" like 0xE0
+ because when it gets printed out, you get a display like:
+ 0xFFFFFFE0 and that's no good
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit ffc50f9bb194343c6303517a517708457a5eb6b8
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat May 5 18:54:42 2007 +0200
+
+ new: FSL and MSR support #2
+
+commit f7e2e0eb0668136305f78bb9c21be79b48a34247
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat May 5 18:27:16 2007 +0200
+
+ new: FSL and MSR support
+
+commit 2f15278c2eb911c668b4fe562130b78cf554d139
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat May 5 18:23:11 2007 +0200
+
+ Coding stylke cleanup; update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 885ec89b648a899a2f32393fd3ffd9f7234c4402
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat May 5 18:05:02 2007 +0200
+
+ Add STX GP3 SSA board to MAKEALL script; update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5499645b3fe17a548af9dfc479ca6e2455f179a2
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat May 5 17:15:50 2007 +0200
+
+ Make "file" command happy with some config.mk files; update CHANGELOG
+
+commit e3b8c78bc2489c27ae020986ef0eaca684866cef
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Sat May 5 08:32:14 2007 +0200
+
+ ppc4xx: Detect if the sysclk on Sequoia is 33 or 33.333 MHz
+
+ The AMCC Secquoia board has been changed in a new revision from using a
+ 33.000 MHz clock to a 33.333 MHz system clock. A bit in the CPLD
+ indicates the difference. This patch reads that bit and uses the correct
+ clock speed for the board. This code is backward compatable will all
+ prior boards. All prior boards will be read as 33.000.
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f544ff6656fca263ed1ebe39899b6d95da67c8b8
+Author: Stefan Roese <sr@denx.de>
+Date: Sat May 5 08:29:01 2007 +0200
+
+ ppc4xx: Sequoia: Remove cpu/ppc4xx/speed.c from NAND booting
+
+ Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
+ for the 4k NAND boot image so define bus_frequency to 133MHz here
+ which is save for the refresh counter setup.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a79886590593ba1d667c840caa4940c61639f18f
+Author: Thomas Knobloch <knobloch@siemens.com>
+Date: Sat May 5 07:04:42 2007 +0200
+
+ NAND: Wrong calculation of page number in nand_block_bad()
+
+ In case that there is no memory based bad block table available the
+ function nand_block_checkbad() in drivers/mtd/nand/nand_base.c will call
+ nand_block_bad() directly. When parameter 'getchip' is set to zero,
+ nand_block_bad() will not right shift the offset to calculate the
+ correct page number.
+
+ Signed-off-by: Thomas Knobloch <knobloch@siemens.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9877d7dcd1eebe61aa5d8b8ffe9c048ea426e6f6
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri May 4 10:02:33 2007 +0200
+
+ Fix initrd length corruption in bootm command.
+
+ When using FDT Images, the length of an inital ramdisk was
+ overwritten (bug introduced by commit 87a449c8, 22 Aug 2006).
+
+ Patches by Timur Tabi & Johns Daniel.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 068aab660bc3912b930be5540e6b3f3fd6ad3c96
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu May 3 19:43:52 2007 -0500
+
+ mpc83xx: fix trivial error in MAKEALL
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit c64a89d6ce8584b9fc64f4e85da9ecac3cfc2c2a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu May 3 16:34:41 2007 +0200
+
+ Update board configuration for STX GP3SSA board:
+
+ Enable hush shell, environment in flash rather in EEPROM,
+ more user-friendly default environment, etc.
+ The simple EEPROM environment can be selected easily in the board
+ config file.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 2c6fb199dc5756fc72f49d1f4de105e089049d65
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Apr 24 14:37:49 2007 +0200
+
+ Cleanup STX GP3SSA code; fix build and compile problems.
+
+commit 35171dc04e028ecacc23ad916a66295472555dbf
+Author: Dan Malek <dan@embeddedalley.com>
+Date: Fri Jan 5 09:15:34 2007 +0100
+
+ Add support for STX GP3SSA (stxssa) Board
+
+ Signed-off-by Dan Malek, <dan@embeddedalley.com>
+
+commit ffa621a0d12a1ccd81c936c567f8917a213787a8
+Author: Andy Fleming <afleming@freescale.com>
+Date: Sat Feb 24 01:08:13 2007 -0600
+
+ Cleaned up some 85xx PCI bugs
+
+ * Cleaned up the CDS PCI Config Tables and added NULL entries to
+ the end
+ * Fixed PCIe LAWBAR assignemt to use the cpu-relative address
+ * Fixed 85xx PCI code to assign powar region sizes based on the
+ config values (rather than hard-coding them)
+ * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 6743105988fc44d5b0d30388c790607835aae7a6
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Apr 23 02:54:25 2007 -0500
+
+ Add support for the 8568 MDS board
+
+ This included some changes to common files:
+ * Add 8568 processor SVR to various places
+ * Add support for setting the qe bus-frequency value in the dts
+ * Add the 8568MDS target to the Makefile
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit af1c2b84bf27c8565baddc82d1abb93700d10e2e
+Author: David Updegraff <dave@cray.com>
+Date: Fri Apr 20 14:34:48 2007 -0500
+
+ Add support for treating unknown PHYs as generic PHYs.
+
+ When bringing up u-boot on new boards, PHY support sometimes gets
+ neglected. Most PHYs don't really need any special support,
+ though. By adding a generic entry that always matches if nothing
+ else does, we can provide support for "unsupported" PHYs for the
+ tsec.
+
+ The generic PHY driver supports most PHYs, including gigabit.
+
+ Signed-off-by: David Updegraff <dave@cray.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit a75af9bfd8fff0499efdbb90601cec5a2afef117
+Author: James Yang <James.Yang@freescale.com>
+Date: Wed Feb 7 15:28:04 2007 -0600
+
+ Conditionalize 8641 Rev1.0 MCM workarounds
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit f64702b7fc8f8df39d31add770df6e372f9e9ce3
+Author: Timur Tabi <timur@freescale.com>
+Date: Mon Apr 30 13:59:50 2007 -0500
+
+ Fix memory initialization on MPC8349E-mITX
+
+ Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP.
+ This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary
+ on some ITX boards, notably those with a revision 3.1 CPU.
+
+ Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into
+ ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Acked-by: Michael Benedict <MBenedict@twacs.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 54b2d434ae9d01787936f34fe1759cf3d7624ae3
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Mon Apr 30 15:26:21 2007 -0500
+
+ mpc83xx: replace elaborate boottime verbosity with 'clocks' command
+
+ and fix CPU: to align with Board: display text.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit c1ab82669d9525998c34e802a12cad662723f22a
+Author: James Yang <James.Yang@freescale.com>
+Date: Fri Mar 16 13:02:53 2007 -0500
+
+ Rewrote picos_to_clk() to avoid rounding errors.
+ Clarified that conversion is to DRAM clocks rather than platform clocks.
+ Made function static to spd_sdram.c.
+
+ Signed-off-by: James Yang <James.Yang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 8b39501d28754e72726ce7fb02310e56dbdf116a
+Author: Stefan Roese <sr@denx.de>
+Date: Sun Apr 29 14:13:01 2007 +0200
+
+ ppc4xx: Bamboo: Use current NAND driver and *not* the legacy driver
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5c5d3242935cf3543af01142627494434834cf98
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Apr 25 12:34:38 2007 -0500
+
+ mpc83xx: minor fixups for 8313rdb introduction
+
+commit 144876a380f5756f57412caf74c1d6dc201dd796
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue Apr 24 23:01:02 2007 +0200
+
+ [PATCH] MTD partition support, JFFS2 support
+
+commit 37ed6cdd4159195bfad68d8a237f6adda8f482cb
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Apr 24 14:03:45 2007 +0200
+
+ ppc4xx: setup 440EPx/GRx ZMII/RGMII bridge depending on PFC register content.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 66ed6cca3f340f7a8a06d9272ae2ef8e96f0273d
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Apr 23 02:37:47 2007 -0500
+
+ Reworked 85xx speed detection code
+
+ Changed the code to read the registers and calculate the clock
+ rates, rather than using a "switch" statement.
+
+ Idea from Andrew Klossner <andrew@cesa.opbu.xerox.com>
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 81f481ca708ed6a56bf9c410e3191dbad581c565
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Apr 23 02:24:28 2007 -0500
+
+ Enable 8544 support
+
+ * Add support to the Makefile
+ * Add 8544 configuration support to the tsec driver
+ * Add 8544 SVR numbers to processor.h
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 0d8c3a2096eaff8d7de89d45e9af4d4b0d4868fe
+Author: Andy Fleming <afleming@freescale.com>
+Date: Fri Feb 23 17:12:25 2007 -0600
+
+ Support 1G size on 8548
+
+ e500v2 and newer cores support 1G page sizes.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 45cef612cc601d2d1c890fbbd7cdc9609a189a46
+Author: Andy Fleming <afleming@freescale.com>
+Date: Fri Feb 23 17:11:16 2007 -0600
+
+ Changed BOOKE_PAGESZ_nGB to BOOKE_PAGESZ_nG
+
+ The other pagesz constants use one letter to specify order of
+ magnitude. Also change the one reference to it in mpc8548cds/init.S
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 1f9a318cea14272edd10d63739e2d326c90f430e
+Author: Andy Fleming <afleming@freescale.com>
+Date: Fri Feb 23 16:28:46 2007 -0600
+
+ Only set ddrioovcr for 8548 rev1.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 9343dbf85bc03033f2102d8e8543567c2c1ad2d2
+Author: Andy Fleming <afleming@freescale.com>
+Date: Sat Feb 24 01:16:45 2007 -0600
+
+ Tweak DDR ECC error counter
+
+ Enable single-bit error counter when memory was cleared by ddr controller.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 85e7c7a45e3dd9c7ce3e722352ba60f8df1a7a4b
+Author: Timur Tabi <timur@freescale.com>
+Date: Mon Feb 12 13:34:55 2007 -0600
+
+ 85xx: write MAC address to mac-address and local-mac-address
+
+ Some device trees have a mac-address property, some have local-mac-address,
+ and some have both. To support all of these device trees, ftp_cpu_setup()
+ should write the MAC address to mac-address and local-mac-address, if they
+ exist.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 03b81b48eec0ad249ec97a4ae16c36fa2e014ff4
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Apr 23 01:44:44 2007 -0500
+
+ Some 85xx cpu cleanups
+
+ * Cleaned up the TSR[WIS] clearing
+ * Cleaned up DMA initialization
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 151d5d992eab8c497b24c816c73dc1ad8bffb4eb
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Apr 23 01:32:22 2007 -0500
+
+ Add cpu support for the 8544
+
+ Recognize new SVR values, and add a few register definitions
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 25d83d7f4ac65727182d8ddaf7ba42fa74cf65ae
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed Apr 11 16:51:02 2007 -0500
+
+ Add MPC8544DS basic port board files.
+
+ Add board port under new board/freescale directory
+ structure and reuse existing PIXIS FPGA support there.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 0cde4b00fc7393b89f379d83a9d436dcb1334bfa
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed Apr 11 16:50:57 2007 -0500
+
+ Add MPC8544DS main configuration file.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 362dd83077ac04c0296bca3e824ec2fb3d44d9d6
+Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+Date: Wed Dec 27 22:07:15 2006 +0300
+
+ Fix PCI I/O space mapping on Freescale MPC85x0ADS
+
+ The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit
+ 52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc which failed to update the #define's
+ describing the local address window used for the PCI I/O space accesses -- fix
+ this and carry over the necessary changes into the MPC8560ADS code since the
+ PCI I/O space mapping was also broken for this board (by the earlier commit
+ 087454609e47295443af793a282cddcd91a5f49c). Add the comments clarifying how
+ the PCI I/O space must be mapped to all the MPC85xx board config. headers.
+
+ Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+
+ board/mpc8540ads/init.S | 4 ++--
+ board/mpc8560ads/init.S | 4 ++--
+ include/configs/MPC8540ADS.h | 5 ++---
+ include/configs/MPC8541CDS.h | 2 +-
+ include/configs/MPC8548CDS.h | 2 +-
+ include/configs/MPC8560ADS.h | 8 ++++----
+ 6 files changed, 12 insertions(+), 13 deletions(-)
+
+commit 96629cbabdb727d4a5e62542deefc01d498db6dc
+Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
+Date: Tue Dec 5 16:42:30 2006 +0800
+
+ u-boot: Fix e500 v2 core reset bug
+
+ The following patch fixes the e500 v2 core reset bug.
+ For e500 v2 core, a new reset control register is added to reset the
+ processor.
+
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 63247a5acd58032e6cf33f525bc3923b467bac88
+Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
+Date: Wed Dec 20 11:01:00 2006 +0800
+
+ u-boot: v2: Remove the fixed TLB and LAW entrynubmer
+
+ Remove the fixed TLB and LAW entry nubmer. Use actually TLB and LAW
+ entry number to control the loop. This can reduce the potential risk
+ for the 85xx processor increasing its TLB adn LAW entry number.
+
+ Signed-off-by: Swarthout Edward <swarthout@freescale.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 0b1934ba12fd408fcc3b8bd9f4b04864c42a42bf
+Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
+Date: Mon Dec 18 17:01:04 2006 +0800
+
+ u-boot: Fix the 85xxcds tsec bug
+
+ Fix the 85xxcds tsec bug.
+ When enable PCI, tsec.o should be added to u-boot.lds to make tsec work.
+
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 7337b237ffc4aaf1b9467024fe472a880d852598
+Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
+Date: Fri Dec 15 14:43:31 2006 +0800
+
+ u-boot: Fix CPU2 errata on MPC8548CDS board
+
+ This patch apply workaround of CPU2 errata on MPC8548CDS board.
+
+ Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
+
+commit 39b18c4f3e0b6d0dc00f4e68bad2da3766c85f09
+Author: ebony.zhu@freescale.com <ebony.zhu@freescale.com>
+Date: Mon Dec 18 16:25:15 2006 +0800
+
+ u-boot: Disables MPC8548CDS 2T_TIMING for DDR by default
+
+ This patch disables MPC8548CDS 2T_TIMING for DDR by default.
+
+ Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
+
+commit 41fb7e0f1ec9b91bdae2565bab5f2e3ee15039c7
+Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
+Date: Thu Dec 14 14:14:55 2006 +0800
+
+ u-boot: Enable PCI function and add PEX & rapidio memory map on MPC8548CDS board
+
+ Enable PCI function and add PEX & rapidio memory map on MPC8548CDS
+ board.
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 96b8a05432f346f36493535c85320b70ec9c7c1b
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:54:15 2007 -0500
+
+ mpc83xx: Add MPC8313ERDB support.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 49ea3b6eafe606285ae4d5c378026153dde53200
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:21 2007 -0500
+
+ mpc83xx: Add generic PCI setup code.
+
+ Board code can now request the generic setup code rather than having to
+ copy-and-paste it for themselves. Boards should be converted to use this
+ once they're tested with it.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 7c98e5193e93df6b9b651851d54b638a61ebb0ea
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:19 2007 -0500
+
+ mpc83xx: Add 831x support to speed.c.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 0f253283a32d91e06844d7f87f9b33f4f4fbce8f
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:18 2007 -0500
+
+ mpc83xx: Add 831x support to global_data.h
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 95e7ef897e54591e615fc1b458b74c286fe1fb06
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:16 2007 -0500
+
+ mpc83xx: Change PVR_83xx to PVR_E300C1-3, and update checkcpu().
+
+ Rather than misleadingly define PVR_83xx as the specific type of 83xx
+ being built for, the PVR of each core revision is defined. checkcpu() now
+ prints the core that it detects, rather than aborting if it doesn't find
+ what it thinks it wants.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit a35b0c4950d84cf9e3a9e32b916135956d1ac636
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:15 2007 -0500
+
+ mpc83xx: Recognize SPR values for MPC8311 and MPC8313.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit d87c57b201b4572d16f1b642998faa00c9912b16
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:31:55 2007 -0500
+
+ mpc83xx: Add register definitions for MPC831x.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 323bfa8f436dc3bc57187c9b1488bc3146ff1522
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Apr 23 12:00:22 2007 +0200
+
+ Remove BOARDLIBS usage completely
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 32556443840f127170e4baa8bdd5b567039f6c36
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat Apr 21 21:07:22 2007 +0200
+
+ [PATCH] SystemACE support for Microblaze
+
+commit 0643631aa1036cd746bf5d15f5a34bc7bc01ea4f
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat Apr 21 21:02:40 2007 +0200
+
+ 16bit read/write little endian
+
+commit 9d1d6a34d26c5933bc097ce73c9348f95573cdd4
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat Apr 21 20:53:31 2007 +0200
+
+ Change ML401 parameters - Xilinx BSP
+
+commit 2e343b9a57f32e1bd08c35c9976910333fb4e13d
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Feb 28 05:37:29 2007 -0600
+
+ mpc8641hpcn: Fix LAW and TLB setup to use the IO_PHYS #defines.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 79cb47391eebef85acadb3f6961ef6c55cace6ac
+Author: Zhang Wei <wei.zhang@freescale.com>
+Date: Fri Jan 19 10:42:37 2007 +0800
+
+ Enable LAWs for MPC8641 PCI-Ex2.
+
+ Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit bd7851ce1e1f140665b520026abf1042968b1102
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Fri Apr 20 14:12:26 2007 -0500
+
+ mpc86xx; Write MAC address to mac-address and local-mac-address
+
+ Some device trees have a mac-address property, some have local-mac-address,
+ and some have both. To support all of these device trees, ftp_cpu_setup()
+ should write the MAC address to mac-address and local-mac-address, if they
+ exist.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 7dbdf28b8bd855a8530dc3292e4982575a197060
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Fri Apr 20 14:11:38 2007 -0500
+
+ mpc86xx: protect memcpy to bad address if a mac-address is missing from dt
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 14da5f7675bbb427c469e3f45006e027b6e21db9
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Apr 20 17:43:28 2007 +0200
+
+ Cleanup compiler warnings, update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6923565db12af34fd5e02d354ee65a8c78ac460f
+Author: Detlev Zundel <dzu@denx.de>
+Date: Fri Apr 20 12:01:47 2007 +0200
+
+ Fix breakage of NC650 board with respect to nand support.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 39f23cd90947639ac278a18ff277ec786b5ac167
+Author: Domen Puncer <domen.puncer@telargo.com>
+Date: Fri Apr 20 11:13:16 2007 +0200
+
+ [RFC PATCH] icecube/lite5200b: fix OF_TBCLK (timebase-frequency) calculation
+
+ G2 core reference manual says decrementer and time base
+ are decreasing/increasing once every 4 bus clock cycles.
+ Lets fix it, so time in Linux won't run twice as fast
+
+ Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 7651f8bdbba03bb0b4f241e2d2c4cb65b230bd56
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Thu Apr 19 23:14:39 2007 -0400
+
+ Fix serious pointer bug with bootm and reserve map.
+
+ What was suppose to be a stack variable was declared as a pointer,
+ overwriting random memory.
+ Also moved the libfdt.a requirement into the main Makefile. That is
+ The U-Boot Way.
+
+commit d21686263574e95cb3e9e9b0496f968b1b897fdb
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Apr 19 09:53:52 2007 +0200
+
+ ppc4xx: Fix chip select timing for SysACE access on AMCC Katmai
+
+ Previous versions used full wait states for the chip select #1 which
+ is connected to the Xilinix SystemACE controller on the AMCC Katmai
+ evaluation board. This leads to really slow access and therefore low
+ performance. This patch now sets up the chip select a lot faster
+ resulting in much better read/write performance of the Linux driver.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 37837828d89084879bee2f2b8c7c68d4695940df
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 18 17:49:29 2007 +0200
+
+ Clenaup, update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit fd094c6379e2ef8a4d0ceb5640b24cb0c8d04449
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 18 17:20:58 2007 +0200
+
+ Update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 2a26ec4732efd7a308d0bbc97714c1d75ef1173b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 18 17:07:26 2007 +0200
+
+ Cleanup, update CHANGELOG
+
+ Sigend-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5f6c732affea9647762d27a4617a2ae64c52dceb
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 18 16:17:46 2007 +0200
+
+ Update CHANGELOG
+
+commit ad4eb555671d97f96dc56eab55103b1f86874b01
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 18 14:30:39 2007 +0200
+
+ MCC200 board: remove warning which is obsolete after PSoC firmware changes
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 3747a3f010b2b1442dec3e871c69788b6017aaae
+Author: Domen Puncer <domen.puncer@telargo.com>
+Date: Wed Apr 18 12:11:05 2007 +0200
+
+ [PATCH] icecube/lite5200b: document wakeup from low-power support
+
+ Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
+
+commit e673226ff9d6aa91b47ceac74b8c13770b06bb37
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Apr 18 12:07:47 2007 +0200
+
+ ppc4xx: Update Acadia to not setup PLL when booting via bootstrap EEPROM
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 90e6f41cf09fc98f6ccb510e183d53ab8546cf2f
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Apr 18 12:05:59 2007 +0200
+
+ ppc4xx: Add output for bootrom location to 405EZ ports
+
+ Now 405EZ ports also show upon bootup from which boot device
+ they are configured to boot:
+
+ U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)
+
+ CPU: AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
+ Bootstrap Option E - Boot ROM Location EBC (32 bits)
+ 16 kB I-Cache 16 kB D-Cache
+ Board: Acadia - AMCC PPC405EZ Evaluation Board
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9c00dfb0bf89c8c23e8af5b5bdf49cf66d769f85
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Apr 17 13:30:33 2007 +0100
+
+ Move ppearse to ARM board list
+ Add Konstantin Kletschke for scb9328.
+ Signed-off-by: Peter Pearse <peter.pearse@arm.com>
+
+commit d3832e8fe1b214ec62424eac36cfda9fc56d21b3
+Author: Domen Puncer <domen.puncer@telargo.com>
+Date: Mon Apr 16 14:00:13 2007 +0200
+
+ [PATCH] icecube/lite5200b: wakeup from low-power support
+
+ U-Boot part of Lite5200b low power mode support.
+ Puts SDRAM out of self-refresh and transfers control to
+ address saved at physical 0x0.
+
+ Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f35a53fc7b0c79fcfe7bdc01163c4b34aaba1460
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sun Apr 15 13:54:26 2007 -0400
+
+ Fix the ft_cpu_setup() property settings.
+
+ Use "setter" functions instead of flags, cleaner and more flexible.
+ It also fixes the problem noted by Timur Tabi that the ethernet MAC
+ addresses were all being set incorrectly to the same MAC address.
+
+commit c28abb9c614f65ce2096cc4a66fc886c77d0e5a4
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Apr 14 22:51:24 2007 -0400
+
+ Improve the bootm command for CONFIG_OF_LIBFDT
+
+ In bootm, create the "/chosen" node only if it doesn't already exist
+ (better matches the previous behavior).
+ Update for proper reserved memory map handling for initrd.
+
+commit 3f9f08cf91c8a6949a5d78a18bd3d8df7b86d888
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Apr 14 22:46:41 2007 -0400
+
+ Add some utilities to manipulate the reserved memory map.
+
+commit 8048cdd56f04a756eeea4951f402bf5cc33785db
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Apr 14 21:16:54 2007 +0200
+
+ Update CHANGELOG
+
+commit 8e6875183cdca91c134408d119d4abcd48ef6856
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Dec 17 18:56:46 2006 +0100
+
+ AVR32: Enable MMC support
+
+ Set up the portmux for the MMC interface and enable the MMC driver
+ along with support for DOS partitions, ext2 and FAT filesystems.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit fc26c97bb6df41b4a95662c34054fe912387bf38
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Fri Jan 20 10:03:53 2006 +0100
+
+ Atmel MCI driver
+
+ Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.
+
+ The AT91 ARM-based CPUs use basically the same hardware, so it should
+ be possible to share this driver, but no effort has been made so far.
+
+ Hardware documentation can be found in the AT32AP7000 data sheet,
+ which can be downloaded from
+
+ http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 05fdab1ef6a10d049a50021a86f1226f444d9b9f
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Dec 17 18:55:37 2006 +0100
+
+ AVR32: Add clk and gpio infrastructure for mmci
+
+ Implement functions for configuring the mmci pins, as well as
+ functions for getting the clock rate of the mmci controller.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 7fac3f69e9f05c5e5326681976c35d129324c4de
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Dec 17 18:53:56 2006 +0100
+
+ Enable partition support with MMC
+
+ Include implementations of init_part() and get_partition_info() when
+ CONFIG_MMC is set.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 9a24f477a1ed5bb0f74377c985d754ebbfa44872
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Dec 17 17:14:30 2006 +0100
+
+ AVR32: Enable networking
+
+ Implement MACB initialization for AVR32 and ATSTK1000, and turn
+ everything on, including the MACB driver.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 5c1fe1ffffd1750a7e47e5a2e2cd600c00e4f009
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Fri Jan 20 10:03:34 2006 +0100
+
+ Atmel MACB ethernet driver
+
+ Driver for the Atmel MACB on-chip ethernet controller.
+
+ This driver has been tested on the ATSTK1000 board with a AT32AP7000
+ CPU. It should probably work on AT91SAM926x as well with some minor
+ modifications.
+
+ Hardware documentation can be found in the AT32AP7000 data sheet,
+ which can be downloaded from
+
+ http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit b4ec9c2d43d894729bb633bfdbdfa95a962c1556
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Dec 17 16:56:14 2006 +0100
+
+ AVR32: Add clk and gpio infrastructure for macb0 and macb1
+
+ Implement functions for configuring the macb0 and macb1 pins, as
+ well as functions for getting the clock rate of the various
+ busses the macb ethernet controllers are connected to.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit d5acb95b16a0a74c643524342c3437e765426d05
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Dec 17 15:39:15 2006 +0100
+
+ AVR32: Implement simple DMA memory allocator
+
+ Implement dma_alloc_coherent() which returns cache-aligned
+ uncacheable memory.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 91975b0fea773c9e681fea8cf3349669f27685ee
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Dec 17 15:46:02 2006 +0100
+
+ Import <linux/mii.h> from the Linux kernel
+
+ Instead of creating yet another set of MII register definitions
+ in the macb driver, here's a complete set of definitions for everyone
+ to use.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 1b804b229556a4d862da93c0ec94e79419364b2c
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed Mar 21 19:47:36 2007 +0100
+
+ AVR32: Include more commands for ATSTK1000
+
+ Include the imi, imls and jffs commands sets by default on ATSTK1000.
+ Also define CONFIG_BOOTARGS to something more useful, define
+ CONFIG_BOOTCOMMAND and enable autoboot by default.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 9c0deb5ae3ea0189f2e08ac29ef1316f1fb8548d
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed Mar 21 19:44:48 2007 +0100
+
+ AVR32: Provide a definition of struct stat
+
+ Copy the definition of struct stat from the Linux kernel.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 12f099c08167a7a51aeee623bc16dafd0841271c
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Dec 17 14:46:06 2006 +0100
+
+ AVR32: Use initdram() instead of board_init_memories()
+
+ Conform to the "standard" interface and use initdram() instead of
+ board_init_memories() on AVR32. This enables us to get rid of the
+ sdram_size member of the global_data struct as well.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 1f4f2121c2685182eb87fa9a9b799d1917387a1c
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Mon Nov 20 15:53:10 2006 +0100
+
+ AVR32: Relocate u-boot to SDRAM
+
+ Relocate the u-boot image into SDRAM like everyone else does. This
+ means that we can handle much larger .data and .bss than we used to.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit df548d3c3e2bbc40258713167859ffc2ce99a900
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sun Nov 19 18:06:53 2006 +0100
+
+ AVR32: Resource management rewrite
+
+ Rewrite the resource management code (i.e. I/O memory, clock gating,
+ gpio) so it doesn't depend on any global state. This is necessary
+ because this code is heavily used before relocation to RAM, so we
+ can't write to any global variables.
+
+ As an added bonus, this makes u-boot's memory footprint a bit smaller,
+ although some functionality has been left out; all clocks are enabled
+ all the time, and there's no checking for gpio line conflicts.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 03d1e1365796cd15d1726e8a51fd8b5be50b2fe9
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sat Nov 18 18:01:13 2006 +0100
+
+ AVR32: Clean up memory-map.h for at32ap7000
+
+ Convert spaces to tabs (must have missed this one last time around),
+ sort the entries by address and group them together by bus
+ connectivity.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 28c699ef69f4b6cdf252e4747b7b590028a88981
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sat Nov 18 17:32:31 2006 +0100
+
+ AVR32: Build position-independent u-boot
+
+ Add -fPIC -mno-init-got to the avr32-specific CFLAGS to make u-boot
+ position independent. This will make relocation a lot easier.
+
+ -mno-init-got means that gcc shouldn't emit code to load the GOT
+ address into r6 in every function prologue. We do it once and for
+ all in the early startup assembly code, so enabling this option
+ makes u-boot a bit faster and smaller.
+
+ The assembly parts have always been position-independent, so no code
+ changes should be necessary.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 5374b36de91d006d1df9536259fa9f66b01aa3aa
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sat Nov 18 17:24:31 2006 +0100
+
+ AVR32: Use avr32-linux- cross-compilation prefix by default
+
+ It doesn't really matter which toolchain you use to compile u-boot,
+ but the avr32-linux one is probably what most people have installed.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit c841beeddebece0039e724fb27f4d1a39ee1c6b6
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Sat Nov 18 17:15:30 2006 +0100
+
+ AVR32: Split start_u_boot into board_init_f and board_init_r
+
+ Split the avr32 initialization code into a function to run before
+ relocation, board_init_f and a function to run after relocation,
+ board_init_r. For now, board_init_f simply calls board_init_r
+ at the end.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 37403005cfe6bb13964d450f6a48a0b0f2f7017e
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Sat Apr 14 05:26:48 2007 +0200
+
+ [Fix] Set the LED status register on the UC101 for the LXT971 PHY.
+ clear the Display after reset.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 7882751c78b7ecabfd49b0eff8de27661c71f16c
+Author: Denis Peter <d.peter@mpl.ch>
+Date: Fri Apr 13 09:13:33 2007 +0200
+
+ [PATCH] Fix bugs in cmd_ide.c and cmd_scsi.c
+
+ Fix bug introduced by "Fix get_partition_info() parameter error in all
+ other calls" from 2005-03-04 in cmd_ide.c and cmd_scsi.c, which prevented
+ to use diskboot or scsiboot form another device than 0.
+
+ Signed-off-by: Denis Peter <d.peter@mpl.ch>
+
+commit 0b94504d22e70f537c17a0d38c87edb6e370977d
+Author: Greg Lopp <lopp@pobox.com>
+Date: Fri Apr 13 08:02:24 2007 +0200
+
+ [PATCH] Fix use of "void *" for block dev read/write buffer pointers
+
+ Signed-of-by: Greg Lopp <lopp@pobox.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 6fbf261f8df294e589cfadebebe5468e3c0f29e9
+Author: Xie Xiaobo <r63061@freescale.com>
+Date: Fri Mar 9 19:08:25 2007 +0800
+
+ Fix two bugs for MPC83xx DDR2 controller SPD Init
+
+ There are a few bugs in the cpu/mpc83xx/spd_sdram.c
+ the first bug is that the picos_to_clk routine introduces a huge
+ rounding error in 83xx.
+ the second bug is that the mode register write recovery field is
+ tWR-1, not tWR >> 1.
+
+commit 2ad3aba01d37b72e7c957b07e102fccd64fe6d13
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Thu Apr 12 14:15:59 2007 +0200
+
+ ppc4xx: Fix i2c divisor calcularion for PPC4xx
+
+ This patch fixes changes the i2c_init(...) function to use the function
+ get_OPB_freq() rather than calculating the OPB speed by
+ sysInfo.freqPLB/sysInfo.pllOpbDiv. The get_OPB_freq() function is
+ specific per processor. The prior method was not and so was calculating
+ the wrong speed for some PPC4xx processors.
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6c9ba919375db977aaad9146bf320c7afd07ae7a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 11 17:25:01 2007 +0200
+
+ Update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 51056dd9863e6a1bc363afbbe1775c58cd967418
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 11 17:22:55 2007 +0200
+
+ Update for SC3 board
+
+ * Make IDE timeout configurable through ide_reset_timeout variable.
+ * Use Newline as "password" string
+ * Use just a single partition in NAND flash
+
+commit 3d98b85800c80dc68227c8f10bf5c93456d6d054
+Author: Haiying Wang <haiying.wang@freescale.com>
+Date: Mon Jan 22 12:37:30 2007 -0600
+
+ Add PIXIS FPGA support for MPC8641HPCN board.
+
+ Move the 8641HPCN's PIXIS code to the new directory
+ board/freescale/common/ as it will be shared by
+ future boards not in the same processor family.
+
+ Write a "pixis_reset" command that utilizes the FPGA
+ reset sequencer to support alternate soft-reset options
+ such as using the "alternate" flash bank, enabling
+ the watch dog, or choosing different CPU frequencies.
+
+ Add documentation for the pixis_reset to README.mpc8641hpcn.
+
+ Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 64dbbd40c58349b64f43fd33dbb5ca0adb67d642
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Fri Apr 6 14:19:43 2007 -0400
+
+ Moved fdt command support code to fdt_support.c
+
+ ...in preparation for improving the bootm command's handling of fdt blobs.
+ Also cleaned up some coding sloppiness.
+
+commit 6679f9299534e488a171a9bb8f9bb891de247aab
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Fri Apr 6 14:17:14 2007 -0400
+
+ libfdt: Make fdt_check_header() public
+
+ Changed _fdt_check_header() to fdt_check_header() and made it part of
+ the interface - it is a useful routine.
+
+ Also did some asthetics cleanup to the include files (headers).
+
+commit c0707ce65677650b5ceab0500ee50ae5168afef2
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Thu Apr 5 18:34:06 2007 +0800
+
+ [Blackfin][PATCH] Kill off a bunch of common local prototypes
+
+commit 7b7e30aa64bb6657a1bfd32fdbdbfeb561e6a48d
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Thu Apr 5 18:33:04 2007 +0800
+
+ [Blackfin][PATCH] Fix dynamic CPLB generation issue
+
+commit 0445e3a264251d75b1be45ef713c70726a2952f0
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Thu Apr 5 18:31:47 2007 +0800
+
+ [Blackfin][PATCH] minior cleanup
+
+commit 155fd766573981090e638b493d5857562151862e
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Thu Apr 5 18:31:18 2007 +0800
+
+ [Blackfin][PATCH] Fix copyright and update license
+
+commit 9fd437bbd75d282f899e1da50be20a2bf38450bc
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Thu Apr 5 18:30:25 2007 +0800
+
+ [Blackfin][PATCH] Add BF537 EMAC driver initialization
+
+commit 889256e8604e0c68db1d866d720894dffede9df6
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Thu Apr 5 18:29:55 2007 +0800
+
+ [Blackfin][PATCH] call real the system synchronize instruction
+
+commit e0df1c921b788289564e4c1ee7120a6a9cd3ab05
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Thu Apr 5 18:29:17 2007 +0800
+
+ [Blackfin][PATCH] remove asm/page.h as we do not actually use/want any of these definitions nor does any other arch include it
+
+commit dfeeab2cd680df047e68e723b246adf6f33bb556
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Thu Apr 5 18:28:34 2007 +0800
+
+ [Blackfin][PATCH]: fix flash unaligned copy issue
+
+commit 443feb740584e406efa203af909fe2926608e8d5
+Author: Igor Marnat <marny@rambler.ru>
+Date: Wed Mar 21 09:55:01 2007 +0300
+
+ Update usage of 'nc' in README.NetConsole
+
+ Added information about usage of NetConsole on systems where the -l and -p
+ switches are mutually exclusive.
+
+ Signed-off-by: Igor Marnat <marny@rambler.ru>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit 31c98a88228021b314c89ebb8104fb6473da4471
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 4 02:09:30 2007 +0200
+
+ Minor coding style cleanup.
+
+commit 94abd7c0583ebe01e799b25f451201deeaab550d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Apr 4 01:49:15 2007 +0200
+
+ Minor cleanup.
+
+commit a65c5768e5537530bd1780af3d3fddc3113a163c
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Apr 2 10:09:30 2007 +0200
+
+ ppc4xx: Change SysACE address on Katmai
+
+ With this new base address of the Xilinx SystemACE controller
+ the Linux driver will be easier to adapt, since it can now be
+ mapped via the "normal" ioremap() call.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit aea03c4e8c3a21ce43d3faf48a6e6d474c8bdf73
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Mar 31 14:30:53 2007 -0400
+
+ Fix some minor whitespace violations.
+
+commit 213bf8c822de8eecaf69860684469cdaba2e9e6a
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Mar 31 12:23:51 2007 -0400
+
+ Add a flattened device tree (fdt) command (2 of 2)
+
+ Modifications to the existing code to support the new fdt command.
+
+commit 781e09ee6e3e3e392ab362c1f0ef1068adc76e3e
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Mar 31 12:22:10 2007 -0400
+
+ Add a flattened device tree (fdt) command (1 of 2)
+
+ The fdt command uses David Gibson's libfdt library to manipulate as well
+ as print the flattened device tree. This patch is the new command,
+ the second part is the modifications to the existing code.
+
+commit 3af0d587d93e0be5f96e1b30fa41e662f8b0803e
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Mar 31 12:13:43 2007 -0400
+
+ libfdt: Enhanced and published fdt_next_tag()
+
+ Enhanced the formerly private function _fdt_next_tag() to allow stepping
+ through the tree, used to produce a human-readable dump, and made
+ it part of the published interface.
+ Also added some comments.
+
+commit fa3a74cec73dfd06a5ae35a9a3368200273aaa71
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Mar 31 12:05:39 2007 -0400
+
+ libfdt: Customizations for use by u-boot.
+
+ Changes to David Gibson's original source to fit into u-boot's
+ environment. No functionality changes.
+
+commit 35748177c64a4a83a00057e93bb33e40278a2a96
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Mar 31 12:00:56 2007 -0400
+
+ libfdt: Import libfdt source (2 of 2)
+
+ This adds the applicable libfdt source files (unmodified) and a README
+ to explain where the source came from.
+
+commit 7cd5da0fe877e7171a4cdd44880bce783132871a
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat Mar 31 11:59:59 2007 -0400
+
+ libfdt: Import libfdt source (1 of 2)
+
+ This adds the applicable libfdt source files (unmodified) and a README
+ to explain where the source came from.
+
+commit da6ebc1bc082cbe3b6bbde079cafe09f7ebbad4b
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Mar 31 13:16:23 2007 +0200
+
+ ppc4xx: Update Katmai bootstrap command
+
+ Now the DDR2 frequency is also 2*PLB frequency when 166MHz PLB
+ is selected.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cabee756a6532986729477c3cc1ea16ef8517ad2
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Mar 31 13:15:06 2007 +0200
+
+ ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
+
+ Additional RAM information is now printed upon powerup, like
+ DDR2 frequency and CAS latency.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 60723803431ac75cad085690789e433d5ab9174e
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Mar 31 08:48:36 2007 +0200
+
+ ppc4xx: Change Yucca config file to support ECC
+
+ With the updated 44x DDR2 driver the Yucca board now supports
+ ECC generation and checking.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 490e5730c674b20d708b783a2c5ffd7208f83873
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Mar 31 08:47:34 2007 +0200
+
+ ppc4xx: Fix "bootstrap" command for Katmai board
+
+ The board specific "bootstrap" command is now fixed and can
+ be used for the AMCC Katmai board to configure different
+ CPU/PLB/OPB frequencies.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 94f54703c3a776ec23e427ca2a16e0a79a5d50c1
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Mar 31 08:46:08 2007 +0200
+
+ ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
+
+ Fix a bug in the auto calibration routine. This driver now runs
+ more reliable with the tested modules. It's also tested with
+ 167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 342cd097be1e7affe82f42ab3da220959a699e64
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Mar 30 22:52:09 2007 +0200
+
+ [PATCH] Clean include dependence
+
+commit 6f934210fb293fde2cfb4251c6d96fdc58b6a906
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Mar 30 22:42:45 2007 +0200
+
+ [CLEAN] Remove inefficient Suzaku code
+
+commit 430f1b0f9a670c2f13eaa52e66a10db96dd3647d
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 28 15:03:16 2007 +0200
+
+ Merge some AMCC make targets to keep the top-level Makefile smaller
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0c75c9d84307a9f1cbe1ff0c4d8937ee3a96475e
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 28 14:52:12 2007 +0200
+
+ i2c: Enable "old" i2c commands even when CONFIG_I2C_CMD_TREE is defined
+
+ The "old" i2c commands (iprobe, imd...) are now compiled in again,
+ even when the i2c command tree is enabled via the CONFIG_I2C_CMD_TREE
+ config option.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5da048adf44bea5e3b94080d02903c2e3fe7aa4a
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue Mar 27 00:32:16 2007 +0200
+
+ PATCH: Resolve GPL license problem
+
+commit 1798049522f594013aea29457d46794298c6ae15
+Author: Michal Simek <root@monstr.eu>
+Date: Mon Mar 26 01:39:07 2007 +0200
+
+ Support for XUPV2P board
+ Reset support
+ BSP autoconfig support
+
+commit 0d974d5297349504a2ddfa09314be573b5df320a
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Mar 24 15:57:09 2007 +0100
+
+ [PATCH] Add 4xx GPIO functions
+
+ This patch adds some 4xx GPIO functions. It also moves some of the
+ common code and defines into a common 4xx GPIO header file.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2db633658bbf366ab0c8dad7a0727e1fb2ae6b11
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Mar 24 15:55:58 2007 +0100
+
+ [PATCH] Small Sequoia cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3cb86f3e40d2a80356177434a99f75bc8baa9caf
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Mar 24 15:45:34 2007 +0100
+
+ [PATCH] Clean up 40EZ/Acadia support
+
+ This patch cleans up all the open issue of the preliminary
+ Acadia support.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6eb1df835191d8ce4b81d5af40fa8e0fbe78e997
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Dec 12 11:02:20 2006 -0600
+
+ Fix 8641HPCN problem with ld version 2.16
+
+ (Dot outside sections problem).
+
+ This fix is in the spirit of 807d5d7319330e336ab34a5623c5e0d73b87d540.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 9964a4dd0d4ef5a037febaebf1aa494b1a72991c
+Author: Haiying Wang <haiying.wang@freescale.com>
+Date: Thu Dec 7 10:35:55 2006 -0600
+
+ Set Rev 2.x 86xx PIC in mixed mode.
+
+ Prevent false interrupt from hanging Linux as MSR[EE] is set
+ to enable interrupts by changing the PIC out of the default
+ pass through mode into mixed mode.
+
+ Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 5a58a73ceb0a4059c42ef64cedbc1a45e0aaa00e
+Author: Jason Jin <jason.jin@freescale.com>
+Date: Thu Dec 7 10:32:35 2006 -0600
+
+ Add flash cmd function to 8641HPCN ramboot
+
+ Also fixes some commmand for 8641 HPCN ramboot case.
+
+ Signed-off-by: Jason Jin <jason.jin@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 2ccceacc04b009d923afb7c26189ba2f8a2a5d46
+Author: Ed Swarthout <ed.swarthout@freescale.com>
+Date: Thu Dec 7 10:34:14 2006 -0600
+
+ Add support for 8641 Rev 2 silicon.
+
+ Without this patch, I am unable to get to the prompt on rev 2 silicon.
+ Only set ddrioovcr for rev1.
+
+ Signed-off-by: Ed Swarthout<ed.swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 44ba464b99001f8bd1c456a1e9d59726252f707a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Mar 22 00:13:12 2007 +0100
+
+ Code cleanup / re-insert previous Copyright entries.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 2a8dfe08359a1b663418b2faa1da1d7bce34d302
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Mar 21 23:26:15 2007 +0100
+
+ Code cleanup. Update CHANGELOG
+
+commit e6615ecf4eaf4dd52696934aed8f5c6474cfd286
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 21 14:54:29 2007 +0100
+
+ ppc4xx: Fix file mode of include/configs/acadia.h
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d5f4614c9350d9333e575100fb250aab774d0258
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Wed Mar 21 14:41:46 2007 +0100
+
+ SPC1920: fix small clock routing bug
+
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 16c0cc1c82081a493ab87c51980b28336ce1bce8
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 21 13:39:57 2007 +0100
+
+ [PATCH] Add AMCC Acadia (405EZ) eval board support
+
+ This patch adds support for the new AMCC Acadia eval board.
+
+ Please note that this Acadia/405EZ support is still in a beta stage.
+ Still lot's of cleanup needed but we need a preliminary release now.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e01bd218b00af73499331a1a701625a852cd286f
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 21 13:38:59 2007 +0100
+
+ [PATCH] Add AMCC PPC405EZ support
+
+ This patch adds support for the new AMCC 405EZ PPC. It is in
+ preparation for the AMCC Acadia board support.
+
+ Please note that this Acadia/405EZ support is still in a beta stage.
+ Still lot's of cleanup needed but we need a preliminary release now.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 07e82cb2e284a893df6693f2a1337ab2c47bf6a1
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Wed Mar 21 08:45:17 2007 +0100
+
+ [PATCH] TQM8272: dont change the bits given from the HRCW
+ for the SIUMCR and BCR Register.
+ Fix the calculation for the EEprom Size
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 654589873dbafcf104dff133ce0d03a4506e9cc3
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Tue Mar 20 18:16:24 2007 +0800
+
+ [Blackfin][PATCH] Add BF561 EZKIT board support
+
+commit a6154fd1cfd020f6da8527e0365b1020a11a71d0
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 19 22:55:58 2007 +0800
+
+ [Blackfin][PATCH] minor cleanup
+
+commit 389b6bb50f745bf5038ce030300d8a8512e96f79
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Mar 19 13:10:08 2007 +0100
+
+ Remove obsoleted POST files.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8e709bbb2636b5670a8f2b575e138eb1f55773f6
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 19 01:26:11 2007 +0800
+
+ [PATCH] Add flash chip M29W320ET/B support
+
+commit 26bf7deca364a5b33f39e8f14ddd3f4081345015
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 19 01:24:52 2007 +0800
+
+ [Blackfin][PATCH] Add BF537 stamp board support
+
+commit 8423e5e31a7235d05a482627315fb11d49c17bd7
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Mar 16 21:11:42 2007 +0100
+
+ [PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval board
+
+ Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
+ DDR memory are dynamically programmed matching the total size
+ of the equipped memory (DIMM modules).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 76d1466f918b881cda2d259254761e73885093c2
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Mar 13 13:38:05 2007 +0100
+
+ [PATCH] renamed environment variable 'addcon' to 'addcons' for PCI405
+ boards in terms of unification.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit a7090b993d3d4d2221ac3f33e6cb1d1b2ccc6bf0
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Mar 13 16:05:55 2007 +0100
+
+ Make SC3 board build with 'make O='; use 'addcons' consistently
+ (SC3 and Jupiter used to use 'addcon' instead).
+
+ Signed-off-by: Wolfgang Denk wd@denx.de
+
+commit 8502e30a28e492c756ea2d7df0ace026388fce4b
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Tue Mar 13 09:40:59 2007 +0100
+
+ [PATCH] update board config for jupiter Board:
+ added Hush Shell,
+ CONFIG_CMDLINE_EDITING,
+ CFG_ENV_ADDR_REDUND activated
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 0d93de11449390a5984b0236c3612e50f6dbb7e8
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 12 12:11:55 2007 +0800
+
+ [Blackfin][PATCH] minor cleanup
+
+commit bfa5754a58477ac917d21527cd0f079d87cf188e
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 12 01:42:06 2007 +0800
+
+ [Blackfin][PATCH] Fix BUILD_DIR option of MAKEALL building issue
+
+commit 8440bb14581a294375c34b91b42512f9753d1130
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Mon Mar 12 00:25:14 2007 +0800
+
+ [Blackfin][PATCH] code cleanup
+
+commit cfc67116a706fd18b8f6a9c11a16753c5626d689
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sun Mar 11 13:48:24 2007 +0100
+
+ [Microblaze][PATCH] part 2
+ timer support
+ interrupt controller support
+ flash support
+ ethernet support
+ cache support
+ board information support
+ env support
+ booting image support
+
+ adding support for Xilinx ML401
+
+commit 76316a318de91f6184e7c22a10e02d275ade2441
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sun Mar 11 13:42:58 2007 +0100
+
+ [Microblaze][PATCH]
+ timer support
+ interrupt controller support
+ flash support
+ ethernet support
+ cache support
+ board information support
+ env support
+ booting image support
+
+ adding support for Xilinx ML401
+
+commit 8db13d63157811c839d15a313d9f2d2f5fd10af3
+Author: Aubrey Li <aubrey.adi@gmail.com>
+Date: Sat Mar 10 23:49:29 2007 +0800
+
+ [Blackfin][PATCH] code cleanup
+
+commit ef26a08fef928b7bc11ae2c109e638dc3a016d91
+Author: Aubrey.Li <aubrey.adi@gmail.com>
+Date: Fri Mar 9 13:40:56 2007 +0800
+
+ [Blackfin][PATCH-2/2] Common files changed to support bf533 platform
+
+commit 3f0606ad0b5639f7f22848fe5b4574e754d0470f
+Author: Aubrey.Li <aubrey.adi@gmail.com>
+Date: Fri Mar 9 13:38:44 2007 +0800
+
+ [Blackfin]PATCH-1/2]: Remove obsolete blackfin port and add bf533 platform support
+
+commit 992423ab43c2bcf6b704853bd00af77450915e20
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 23:00:08 2007 +0100
+
+ ppc4xx: Fix file mode of sequoia.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit eb92f613556800f7483666db09d9a237ad911d4a
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Mar 8 22:52:51 2007 +0100
+
+ Minor cleanup.
+
+commit 8ce16f55c7b9752af3d8bed84521aec5337e2de1
+Author: John Otken john@softadvances.com <john@softadvances.com>
+Date: Thu Mar 8 09:39:48 2007 -0600
+
+ ppc4xx: Clear Sequoia/Rainier security engine reset bits
+
+ Signed-off-by: John Otken john@softadvances.com <john@softadvances.com>
+
+commit 650a330dd2539130c8c324791e2f9f75aed79d4e
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Mar 8 16:26:52 2007 +0100
+
+ [PATCH] I2C: add some more SPD eeprom decoding for DDR2 modules
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit d9fc703246840c4b268debf48c334ba55c597dc0
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Mar 8 16:25:47 2007 +0100
+
+ [PATCH] I2C: disable flat i2c commands when CONFIG_I2C_CMD_TREE is defined
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit ced5b9029043397348cdc88e0cfcd6b1f629250b
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Mar 8 16:23:11 2007 +0100
+
+ [PATCH] 4xx: allow CONFIG_I2C_CMD_TREE without CONFIG_I2C_MULTI_BUS
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit d8a8ea5c476d37006fc7f85b7f903142795c8b14
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Thu Mar 8 16:20:32 2007 +0100
+
+ [PATCH] I2C: Add missing default CFG_SPD_BUS_NUM
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit f9fc6a5852a6335840882fa2111925010eea1abe
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Mar 7 15:32:01 2007 +0100
+
+ fixed ethernet phy configuration for plu405 board
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 769104c9356594deb2092e204a39c05b33202d6c
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Mar 8 21:49:27 2007 +0100
+
+ Minor cleanup
+
+commit 00cdb4ce5e1b42248e7e6522ad0da3421b988afa
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 10:13:16 2007 +0100
+
+ [PATCH] Update AMCC Luan 440SP eval board support
+
+ The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
+ inititializition. This includes DDR auto calibration and support
+ for different DIMM modules, instead of the fixed setup used in
+ the earlier version.
+
+ This patch also enables the cache in FLASH for the startup
+ phase of U-Boot (while running from FLASH). After relocating to
+ SDRAM the cache is disabled again. This will speed up the boot
+ process, especially the SDRAM setup, since there are some loops
+ for memory testing (auto calibration).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2f5df47351910a2936c7741cf111855829200943
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 10:10:18 2007 +0100
+
+ [PATCH] Update AMCC Yucca 440SPe eval board support
+
+ The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR
+ inititializition. This includes DDR auto calibration and support
+ for different DIMM modules, instead of the fixed setup used in
+ the earlier version.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2721a68a9ea91f1e494649ce68b2577261f578e2
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 10:07:18 2007 +0100
+
+ ppc4xx: Small AMCC Katmai 440SPe update
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit df294497479b1dca6dd86318b2a912f72fede0df
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 8 10:06:09 2007 +0100
+
+ ppc4xx: Update 440SP/440SPe DDR SPD setup code to support 440SP
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 83853178bd36bca6f0f8f1331476620c84a587fc
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Mar 7 12:14:50 2007 -0600
+
+ net - Support ping reply when processing net-loop
+
+ Add ICMP_ECHO_REQUEST packet support by responding with a ICMP_ECHO_REPLY.
+
+ This permits the ping command to test the phy interface when the phy
+ is put in loopback mode (typically by setting register 0 bit 14).
+
+ It also allows the port to respond to an external ping when u-boot is
+ processing some other net command (such as tftp). This is useful when
+ tftp appears to hang.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit fa1aef15bcd47736687be1af544506e90fba545d
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 7 16:43:00 2007 +0100
+
+ [PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval board
+
+ Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the
+ DDR memory are dynamically programmed matching the total size
+ of the equipped memory (DIMM modules).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e2ebe696818939e2b974628be9c921ea3fe9de13
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Mar 7 16:39:36 2007 +0100
+
+ [PATCH] Fix AMCC 44x SPD SDRAM init code to support 2 DIMM's
+
+ This patch fixes a problem that occurs when 2 DIMM's are
+ used. This problem was first spotted and fixed by Gerald Jackson
+ <gerald.jackson@reaonixsecurity.com> but this patch fixes the
+ problem in a little more clever way.
+
+ This patch also adds the nice functionality to dynamically
+ create the TLB entries for the SDRAM (tlb.c). So we should
+ never run into such problems with wrong (too short) TLB
+ initialization again on these platforms.
+
+ As this feature is new to the "old" 44x SPD DDR driver, it
+ has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 39218433983417b9df087976a79e3f80dd5e83d6
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Mar 7 16:33:44 2007 +0100
+
+ UC101: fix compiler warnings
+
+commit 8d7e2732221bc2d64df14f700c64c23e0a4c3dce
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Mar 7 16:19:46 2007 +0100
+
+ HMI1001: fix build error, cleanup compiler warnings.
+
+commit ad5bb451ade552c44bef9119d907929ebc2c126f
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Mar 6 18:08:43 2007 +0100
+
+ Restructure POST directory to support of other CPUs, boards, etc.
+
+commit a5284efd125967675b2e9c6ef7b95832268ad360
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Mar 6 18:01:47 2007 +0100
+
+ Fix HOSTARCH handling.
+ Patch by Mike Frysinger, Mar 05 2007
+
+commit 07b7b0037aac5102939917d7cbe561b5c0d5aa44
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Mar 6 07:47:04 2007 +0100
+
+ [PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setup
+
+ As provided by the AMCC applications team, this patch optimizes the
+ DDR2 setup for 166MHz bus speed. The values provided are also save
+ to use on a "normal" 133MHz PLB bus system. Only the refresh counter
+ setup has to be adjusted as done in this patch.
+
+ For this the NAND booting version had to include the "speed.c" file
+ from the cpu/ppc4xx directory. With this addition the NAND SPL image
+ will just fit into the 4kbytes of program space. gcc version 4.x as
+ provided with ELDK 4.x is needed to generate this optimized code.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 647d3c3eed0da1d1505eecabe0b0fab96f956e68
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sun Mar 4 01:36:05 2007 +0100
+
+ Some code cleanup.
+
+commit 781e026c8aa6f7e9eb5f0e72cc4d20971219b148
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Feb 28 00:02:04 2007 -0600
+
+ mpc83xx: fix implicit declaration of function 'ft_get_prop' warnings
+
+ (cherry picked from c5bf13b02284c3204a723566a9bab700e5059659 commit)
+
+commit 4feab4de7bfc2cb2fed36ad76f93c3a69659bbaf
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Feb 27 23:51:42 2007 -0600
+
+ mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode
+
+ The config value for:
+ * CFG_ACR_PIPE_DEP
+ * CFG_ACR_RPTCNT
+ * CFG_SPCR_TSEC1EP
+ * CFG_SPCR_TSEC2EP
+ * CFG_SCCR_TSEC1CM
+ * CFG_SCCR_TSEC2CM
+
+ Were not being used when setting the appropriate register
+
+ Added:
+ * CFG_SCCR_USBMPHCM
+ * CFG_SCCR_USBDRCM
+ * CFG_SCCR_PCICM
+ * CFG_SCCR_ENCCM
+
+ To allow full config of the SCCR.
+
+ Also removed random CFG_SCCR settings in MPC8349EMDS, TQM834x, and sbc8349
+ that were just bogus.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit d51b3cf371cd441030460ef19d36b2924c361b1a
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Feb 22 20:06:57 2007 -0600
+
+ mpc83xx: update [local-]mac-address properties on UEC based devices
+
+ 8360 and 832x weren't updating their [local-]mac-address
+ properties. This patch fixes that.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 61f4f912acbe60776c5e00df1ec94094ce672957
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Feb 13 10:41:42 2007 -0600
+
+ mpc83xx: write MAC address to mac-address and local-mac-address
+
+ Some device trees have a mac-address property, some have local-mac-address,
+ and some have both. To support all of these device trees, this patch
+ updates ftp_cpu_setup() to write the MAC address to mac-address if it exists.
+ This function already updates local-mac-address.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 22d71a71f57fd5d38b27ac3848e50d790360a598
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Feb 27 18:41:08 2007 -0600
+
+ mpc83xx: add command line editing by default
+
+commit 3fc0bd159103b536e1c54c6f4457a09b3aba66ca
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Feb 14 19:50:53 2007 -0600
+
+ mpc83xx: Disable G1TXCLK, G2TXCLK h/w buffers
+
+ Disable G1TXCLK, G2TXCLK h/w buffers. This patch
+ fixes a networking timeout issue with MPC8360EA (Rev.2) PBs.
+
+ Verified on Rev. 1.1, Rev. 1.2, and Rev. 2.0 boards.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+ Signed-off-by: Emilian Medve <Emilian.Medve@freescale.com>
+
+commit d61853cf2472e0b8bcbd131461a93d1c49ff0c1f
+Author: Xie Xiaobo <r63061@freescale.com>
+Date: Wed Feb 14 18:27:17 2007 +0800
+
+ mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xx
+
+ The code supply fixed and SPD initialization for MPC83xx DDR2 Controller.
+ it pass DDR/DDR2 compliance tests.
+
+ Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
+
+commit b110f40bd180c6b560276589beedf753e97c46ce
+Author: Xie Xiaobo <r63061@freescale.com>
+Date: Wed Feb 14 18:27:06 2007 +0800
+
+ mpc83xx: Add the cpu specific code for MPC8360E rev2.0 MDS
+
+ MPC8360E rev2.0 have new spridr,and PVR value,
+ The MDS board for MPC8360E rev2.0 has 32M bytes Flash and 256M DDR2 DIMM.
+
+ Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
+
+commit 8d172c0f0d85998a256a95b7459a5403a30380ed
+Author: Xie Xiaobo <r63061@freescale.com>
+Date: Wed Feb 14 18:26:44 2007 +0800
+
+ mpc83xx: Add the cpu and board specific code for MPC8349E rev3.1 MDS
+
+ MPC8349E rev3.1 have new spridr,and PVR value,
+ The MDS board for MPC8349E rev3.1 has 32M bytes Flash and 256M DDR2 DIMM.
+
+ Signed-off-by: Xie Xiaobo<X.Xie@freescale.com>
+
+commit f6f5f709e5c8e4564c4dfeecfdf2279244f9c83b
+Author: Joakim Tjernlund <joakim.tjernlund@transmode.se>
+Date: Wed Jan 31 11:04:19 2007 +0100
+
+ mpc83xx: Fix empty i2c reads/writes in fsl_i2c.c
+
+ Fix empty i2c reads/writes, i2c_write(0x50, 0x00, 0, NULL, 0)
+ which is used to se if an slave will ACK after receiving its address.
+
+ Correct i2c probing to use this method as the old method could upset
+ a slave as it wrote a data byte to it.
+
+ Add a small delay in i2c_init() to let the controller
+ shutdown any ongoing I2C activity.
+
+ Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+commit 7a78f148d6a7298e4fface680dc7eacd877b1aba
+Author: Timur Tabi <timur@freescale.com>
+Date: Wed Jan 31 15:54:29 2007 -0600
+
+ mpc83xx: Add support for the MPC8349E-mITX-GP
+
+ Add support for the MPC8349E-mITX-GP, a stripped-down version of the
+ MPC8349E-mITX. Bonus features include support for low-boot (BMS bit in
+ HRCW is 0) for the ITX and a README for the ITX and the ITX-GP.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit fab16807adad350f618024350c6950165c247c72
+Author: Timur Tabi <timur@freescale.com>
+Date: Wed Jan 31 15:54:20 2007 -0600
+
+ mpc83xx: Delete sdram_init() for MPC8349E-mITX
+
+ There is no SDRAM on any of the 8349 ITX variants, so function sdram_init()
+ never does anything. This patch deletes it.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit a87c856eb411b9365937d0d4b9c21e46adbe1c14
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Jan 19 10:43:26 2007 +0800
+
+ mpc83xx: Fix the LAW1/3 bug
+
+ The patch solves the alignment problem of the local bus access windows to
+ render accessible the memory bank and PHY registers of UPC 1 (starting at
+ 0xf801 0000). What we actually did was to adjust the sizes of the bus
+ access windows so that the base address alignment requirement would be met.
+
+ Signed-off-by: Chereji Marian <marian.chereji@freescale.com>
+ Signed-off-by: Gridish Shlomi <gridish@freescale.com>
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 97c4b397dce236a7318b304667bf89e59d08b17c
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jan 30 16:15:31 2007 -0600
+
+ mpc83xx: don't hang if watchdog configured on 8360, 832x
+
+ don't hang if watchdog configured on 8360, 832x
+
+ The watchdog programming model is the same across all 83xx devices;
+ make the code reflect that.
+
+commit b70047478570e371ce7223be342ce98afea0f7d6
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jan 30 16:15:21 2007 -0600
+
+ mpc83xx: protect memcpy to bad address if a local-mac-address is missing from dt
+
+ protect memcpy to bad address if a local-mac-address is missing from dt
+
+commit 6752ed088c75c26a89b70c46b7326a4cd6015f29
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jan 30 16:15:04 2007 -0600
+
+ mpc83xx: make 8360 default environment fdt be 8360 (not 8349)
+
+ make 8360 default environment fdt be 8360 (not 8349)
+
+commit a28899c910024a0226331df07207b1038c300c93
+Author: Emilian Medve <Emilian.Medve@freescale.com>
+Date: Tue Jan 30 16:14:50 2007 -0600
+
+ mpc83xx: Fix alternating tx error / tx buffer not ready bug in QE UEC
+
+ The problem is not gcc4 but the code itself. The BD_STATUS() macro can't
+ be used for busy-waiting since it strips the 'volatile' property from
+ the bd variable. gcc3 was working by pure luck.
+
+ This is a follow on patch to "Fix the UEC driver bug of QE"
+
+commit 3e78a31cfe3d3022f46f67eb88e1281d5cc2eb89
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Jan 30 14:08:30 2007 -0600
+
+ mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead
+
+ The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all
+ MPC834X class processors. Change the protections from CONFIG_MPC8349 to
+ CONFIG_MPC834X so they are more generic.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ae246dc6c1937c291014eadd90b6d48c438c7cb0
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Jan 25 13:40:55 2007 -0600
+
+ mpc83xx: add MPC832XEMDS and sbc8349 to MAKEALL
+
+commit 4decd84e8f04279c5cfff7f8e907465ef8d8a3fb
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Jan 24 17:18:37 2007 -0600
+
+ mpc83xx: sort Makefile targets
+
+ reordered targets alphabetically
+
+commit 91e25769771c1164ed63ffca0add49f934ae3343
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Tue Jan 16 11:38:14 2007 -0500
+
+ mpc83xx: U-Boot support for Wind River SBC8349
+
+ I've redone the SBC8349 support to match git-current, which
+ incorporates all the MPC834x updates from Freescale since the 1.1.6
+ release, including the DDR changes.
+
+ I've kept all the SBC8349 files as parallel as possible to the
+ MPC8349EMDS ones for ease of maintenance and to allow for easy
+ inspection of what was changed to support this board. Hence the SBC8349
+ U-Boot has FDT support and everything else that the MPC8349EMDS has.
+
+ Fortunately the Freescale updates added support for boards using CS0,
+ but I had to change spd_sdram.c to allow for board specific settings for
+ the sdram_clk_cntl (it is/was hard coded to zero, and that remains the
+ default if the board doesn't specify a value.)
+
+ Hopefully this should be mergeable as-is and require no whitespace
+ cleanups or similar, but if something doesn't measure up then let me
+ know and I'll fix it.
+
+ Thanks,
+ Paul.
+
+commit 05031db456ab227f3e3752f37b9b812b65bb83ad
+Author: Sam Song <samsongshu@yahoo.com.cn>
+Date: Thu Dec 14 19:03:21 2006 +0800
+
+ mpc83xx: Remove a redundant semicolon in mpc8349itx.c
+
+ A redundant semicolon existed in mpc8349itx.c
+ should be removed.
+
+ Signed-off-by: Sam Song <samsongshu@yahoo.com.cn>
+
+commit f35f358241c549be3f75cfe2eaa642914275b7ba
+Author: Jerry Van Baren <gerald.vanbaren@comcast.net>
+Date: Wed Dec 6 21:23:55 2006 -0500
+
+ mpc83xx: Put the version (and magic) after the HRCW.
+
+ Put the version (and magic) after the HRCW. This puts it in a fixed
+ location in flash, not at the start of flash but as close as we can get.
+
+ Signed-off-by: Jerry Van Baren <vanbaren@cideas.com>
+
+commit 48aecd969171a6e99a55fae04933857787f9a5bd
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Dec 7 21:14:51 2006 +0800
+
+ mpc83xx: Add the MPC832XEMDS board readme
+
+ Add the MPC832XEMDS board readme
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 24c3aca3f1358b113d3215adb5433b156e99f72b
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Dec 7 21:13:15 2006 +0800
+
+ mpc83xx: Add support for the MPC832XEMDS board
+
+ This patch supports DUART, ETH3/4 and PCI etc.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit e080313c32322e15ab5a18eb896a252858c57284
+Author: Dave Liu <r63238@freescale.com>
+Date: Thu Dec 7 21:11:58 2006 +0800
+
+ mpc83xx: streamline the 83xx immr head file
+
+ For better format and style, I streamlined the 83xx head files,
+ including immap_83xx.h and mpc83xx.h. In the old head files, 1)
+ duplicated macro definition appear in the both files; 2) the structure
+ of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The
+ macro definition put inside the each structure. So, I cleaned up the
+ structure of QE immr from immap_83xx.h, deleted the duplicated stuff and
+ moved the macro definition to mpc83xx.h, Just like MPC8260.
+
+ CHANGELOG
+
+ *streamline the 83xx immr head file
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit ddd02492f43db5408f5ab9f823b0ba5796e28ef0
+Author: Dave Liu <r63238@freescale.com>
+Date: Wed Dec 6 11:38:17 2006 +0800
+
+ mpc83xx: Fix the UEC driver bug of QE
+
+ The patch prevents the GCC tool chain from striping useful code for
+ optimization. It will make UEC ethernet driver workable, Otherwise the
+ UEC will fail in tx when you are using gcc4.x. but the driver can work
+ when using gcc3.4.3.
+
+ CHANGELOG
+
+ *Prevent the GCC from striping code for optimization, Otherwise the UEC
+ will tx failed when you are using gcc4.x.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit ba58e4c9a9a917ce795dd16d4ec8d515f9f7aa35
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 1 21:11:36 2007 +0100
+
+ [PATCH] Update AMCC Katmai 440SPe eval board support
+
+ This patch updates the recently added Katmai board support. The biggest
+ change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
+ driver.
+
+ Please note, that still some problems are left with some memory
+ configurations. See the driver for more details.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8c12045a3b06c5b6675d3fe02fbc9f545988129a
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 1 07:03:25 2007 +0100
+
+ [PATCH] I2C: Add missing default CFG_RTC_BUS_NUM & CFG_DTT_BUS_NUM
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ccbc7036648e465697ca298ba51e0e76dda352a0
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Feb 28 01:28:53 2007 +0100
+
+ SC3: fix typo in default environment
+
+commit e344568b1b46af85ec32d815586f91bc115d6223
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue Feb 27 20:15:30 2007 +0300
+
+ MCC200: Fixes for update procedure
+
+ - fix logic error in image type handling
+ - make sure file system images (cramfs etc.) get stored in flash
+ with image header stripped so they can be mounted through MTD
+
+commit 743571145b37182757d4e688a77860b36ee77573
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Feb 27 14:26:04 2007 +0100
+
+ Minor code cleanup.
+
+commit 638dd1458bbdc2a55d4b9e25c5c4e1f838a5dc72
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Tue Feb 27 12:40:16 2007 +0300
+
+ MCC200 update - add LCD Progress Indicator
+
+commit 6c7cac8c4fce0ea2bf8e15ed8658d87974155b44
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Feb 22 07:43:34 2007 +0100
+
+ [PATCH] get_dev() now unconditionally uses manual relocation
+
+ Since the relocation fix is not included yet and we're not sure how
+ it will be added, this patch removes code that required relocation
+ to be fixed for now.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8274ec0bd01d2feb2c7f095eba78d42ea009798b
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Feb 22 07:40:23 2007 +0100
+
+ [PATCH] Change systemace driver to select 8 & 16bit mode
+
+ As suggested by Grant Likely this patch enables the Xilinx SystemACE
+ driver to select 8 or 16bit mode upon startup.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3a197b2fe49d6fa03978e60af2394efe9c70b527
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Wed Feb 21 16:52:31 2007 +0100
+
+ [PATCH v3] Add sync to ensure flash_write_cmd is fully finished
+
+ Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
+ is fully finished. The sync() is defined in each CPU's io.h file. For
+ those CPUs which do not need sync for now, a dummy sync() is defined in
+ their io.h as well.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit da04995c7dc6772013a9a0dc5c767f190c402478
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Feb 21 13:44:34 2007 +0100
+
+ [PATCH] Fix problem in systemace driver (ace_writew instead of ace_write)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 751bb57107d78978ae08e697c3deba816f5be091
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 13:21:57 2007 +0100
+
+ [PATCH] Fix relocation problem with "new" get_dev() function
+
+ This patch enables the "new" get_dev() function for block devices
+ introduced by Grant Likely to be used on systems that still suffer
+ from the relocation problems (manual relocation neede because of
+ problems with linker script).
+
+ Hopefully we can resolve this relocation issue soon for all platform
+ so we don't need this additional code anymore.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d93e2212f962668b3dce091ff5edc33f2347fe37
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 13:17:42 2007 +0100
+
+ [PATCH] Update SystemACE driver for 16bit access
+
+ This patch removes some problems when the Xilinx SystemACE driver
+ is used with 16bit access on an big endian platform (like the
+ AMCC Katmai).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 874bb7b88fe9b4648e1288a387af2e31014a72f3
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 13:15:40 2007 +0100
+
+ [PATCH] Clean up Katmai (440SPe) linker script
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4745acaa1a603b67f6b9b7970365ebadd7d6586f
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:57:08 2007 +0100
+
+ [PATCH] Add support for the AMCC Katmai (440SPe) eval board
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0dc018ece13effc689e47479ea9ebf1c98a507f5
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:51:26 2007 +0100
+
+ [PATCH] I2C: Add support for multiple I2C busses for RTC & DTT
+
+ This patch switches to the desired I2C bus when the date/dtt
+ commands are called. This can be configured using the
+ CFG_RTC_BUS_NUM and/or CFG_DTT_BUS_NUM defines.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4037ed3b63923cfcec27f784a89057c3cbabcedb
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:43:34 2007 +0100
+
+ [PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support
+
+ This patch adds support for the DDR2 controller used on the
+ 440SP and 440SPe. It is tested on the Katmai (440SPe) eval
+ board and works fine with the following DIMM modules:
+
+ - Corsair CM2X512-5400C4 (512MByte per DIMM)
+ - Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
+ - Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)
+
+ This patch also adds the nice functionality to dynamically
+ create the TLB entries for the SDRAM (tlb.c). So we should
+ never run into such problems with wrong (too short) TLB
+ initialization again on these platforms.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 36d830c9830379045f5daa9f542ac1c990c70068
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:35:42 2007 +0100
+
+ [PATCH] PPC4xx: Split 4xx SPD SDRAM init routines into 2 files
+
+ Since the existing 4xx SPD SDRAM initialization routines for the
+ 405 SDRAM controller and the 440 DDR controller don't have much in
+ common this patch splits both drivers into different files.
+
+ This is in preparation for the 440 DDR2 controller support (440SP/e).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 79b2d0bb2eae09602448f7a7cb56530d2f31e6c6
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Feb 20 10:27:08 2007 +0100
+
+ [PATCH] PPC4xx: Add support for multiple I2C busses
+
+ This patch adds support for multiple I2C busses on the PPC4xx
+ platforms. Define CONFIG_I2C_MULTI_BUS in the board config file
+ to make use of this feature.
+
+ It also merges the 405 and 440 i2c header files into one common
+ file 4xx_i2c.h.
+
+ Also the 4xx i2c reset procedure is reworked since I experienced
+ some problems with the first access on the 440SPe Katmai board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit eb867a76238fb38e952c37871b16d0d7fd61c95f
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:45 2007 +0100
+
+ [PATCH 9_9] Use "void *" not "unsigned long *" for block dev read_write buffer pointers
+
+ Block device read/write is anonymous data; there is no need to use a
+ typed pointer. void * is fine. Also add a hook for block_read functions
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 53758fa20e935cc87eeb0519ed365df753a6f289
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:38 2007 +0100
+
+ [PATCH 8_9] Add block_write hook to block_dev_desc_t
+
+ Preparation for future patches which support block device writing
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f4852ebe6ca946a509667eb68be42026f837be76
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:31 2007 +0100
+
+ [PATCH 7_9] Replace ace_readw_ace_writeb functions with macros
+
+ Register read/write does not need to be wrapped in a full function. The
+ patch replaces them with macros.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 3a8ce9af6fcb5744a7851b4440c07688acc40844
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:23 2007 +0100
+
+ [PATCH 6_9] Move common_cmd_ace.c to drivers_systemace.c
+
+ The code in this file is not a command; it is a device driver. Put it in
+ the correct place. There are zero functional changes in this patch, it
+ only moves the file.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 984618f3e7794c783ec8d1511e74c6ee2d69bfe4
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:16 2007 +0100
+
+ [PATCH 5_9] Whitespace fixup on common_cmd_ace.c (using Lindent)
+
+ This patch is in preparation of additional changes to the sysace driver.
+ May as well take this opportunity to fixup the inconsistent whitespace since
+ this file is about to undergo major changes anyway.
+
+ There are zero functional changes in this patch. It only cleans up the
+ the whitespace.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 80ba981d940471fe7e539e64fa3d2bd80002beda
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:07 2007 +0100
+
+ [PATCH 4_4] Remove local implementation of isprint() in ft_build.c
+
+ isprint is already defined in ctype.c
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit c95c4280d751ca078c2ff58228d2f2b44ccf0600
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:05:00 2007 +0100
+
+ [PATCH 3_9] Move buffer print code from md command to common function
+
+ Printing a buffer is a darn useful thing. Move the buffer print code
+ into print_buffer() in lib_generic/
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 99b0f0fd3fbf2572ae1a7723dd90cffc8e85130a
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:04:52 2007 +0100
+
+ [PATCH 2_4] Use config.h, not xparameters.h, for xilinx targets
+
+ Change the xilinx device drivers and board code to include config.h
+ instead of xparameters.h directly. config.h always includes the
+ correct xparameters file. This change reduces the posibility of
+ including the wrong file when adding a new xilinx board port
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 735dd97b1b20e777d059c7b389fe9d70cd3f80c7
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Feb 20 09:04:34 2007 +0100
+
+ [PATCH 1_4] Merge common get_dev() routines for block devices
+
+ Each of the filesystem drivers duplicate the get_dev routine. This change
+ merges them into a single function in part.c
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f5fcc3c20b65554e98a165542c36ee0c610a2d81
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Feb 19 23:09:51 2007 +0100
+
+ MCC200: Software Updater: allow both "ramdisk" and "filesystem" types
+ as root file system images.
+
+commit 489c696ae7211218961d159e43e722d74c36fcbc
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Wed Feb 14 14:30:28 2007 +0300
+
+ MCC200: Extensions to Software Update Mechanism
+
+ Update / extend Software Update Mechanism for MCC200 board:
+
+ - Add support for rootfs image added. The environment variables
+ "rootfs_st" and "rootfs_nd" can be used to override the default
+ values of the image start and end.
+ - Remove excessive key check code.
+ - Code cleanup.
+
+commit 4be23a12f23f1372634edc3215137b09768b7949
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Feb 19 08:23:15 2007 +0100
+
+ [PATCH] Update Sequoia EBC configuration (NOR FLASH)
+
+ As spotted by Matthias Fuchs, the READY input should not be
+ enabled for the NOR FLASH on the Sequoia board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2605e90bf676d48123afe5719a846d2b52b24aac
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Feb 16 07:57:42 2007 +0100
+
+ [PATCH] Added support for the jupiter board.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 497d012e5be0194e1084073d0081eb1a844796b2
+Author: Gary Jennejohn <garyj@pollux.denx.de>
+Date: Mon Feb 12 13:11:50 2007 +0100
+
+ LPC2292: patch from Siemens.
+
+commit b0b1a920aebead0d44146e73676ae9d80fffc8e2
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Feb 10 08:49:31 2007 +0100
+
+ [PATCH] Add missing p3mx.h file to repository (ups)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 53d4a4983fb9b3ae5f7b2f10c599aca2b1b4034a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Fri Feb 9 10:45:42 2007 +0100
+
+ [Motion-PRO] Preliminary support for the Motion-PRO board.
+
+commit 5a753f98c6a01bd1c61a9a3f95e8329a35f62994
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Feb 7 16:51:08 2007 +0100
+
+ [PATCH] Update some AMCC 4xx board config files (set initrd_high)
+
+ Some boards that can have more than 768MBytes of SDRAM need to
+ set "initrd_high", so that the initrd can be accessed by the
+ Linux kernel.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7372ca68227930d03cffa548310524cad5b96733
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Feb 2 12:44:22 2007 +0100
+
+ [PATCH] Correctly display PCI arbiter en-/disabled on some 4xx boards
+
+ Previously the strapping DCR/SDR was read to determine if the internal PCI
+ arbiter is enabled or not. This strapping bit can be overridden, so now
+ the current status is read from the correct DCR/SDR register.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2aa54f651a42d198673318f07a20c89a43e4d197
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Feb 2 12:42:08 2007 +0100
+
+ [PATCH] Change configuration output of Sycamore, Yellowstone & Rainier
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 23744d6b5bf17592eb6a0ef4f318f6089f55993b
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Feb 1 13:22:41 2007 +0100
+
+ [PATCH] Remove PCI-PNP configuration from Sequoia/Rainier config file
+
+ When PCI PNP is enabled the pci pnp configuration routine is called
+ which sets the PCI_CACHE_SIZE_LINE to 8. This seems to generate some
+ problems with some PCI cards. For now disable the PCI PNP configuration.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2902fadade3be7659467e8d074048c6b7068f5c0
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 31 16:56:10 2007 +0100
+
+ [PATCH] Update 440EPx/440GRx cpu detection
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d5ea287b02a6945c3977410e364a879dd1a555c8
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 31 16:38:04 2007 +0100
+
+ [PATCH] Update esd cpci5200 files
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+
+commit 8b7d1f0ab7d7c4fe3160bbf74a7e9690d9f3a3ab
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 31 16:37:34 2007 +0100
+
+ [PATCH] Add support for esd mecp5200 board
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+
+commit 71a4e5fda8b60044ab9f46069fa1cfa26bdd07ff
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jan 31 12:38:50 2007 +0100
+
+ [PATCH] Remove unneccessary yellowstone board config file
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e802594b6fa1b166308820c276b96dc0d7cc731c
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 30 17:06:10 2007 +0100
+
+ [PATCH] Update Sequoia (440EPx) config file
+
+ The config file now handles the 2nd target, the Rainier (440GRx)
+ evaluation board better. Additionally the PPC input clock was
+ adjusted to match the correct value of 33.0 MHz.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 700200c67e73b83751418abe7815840dca8fd6cb
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 30 17:04:19 2007 +0100
+
+ [PATCH] Merge Yosemite & Yellowstone board ports
+
+ Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR)
+ share one config file and all board specific files. This way we
+ don't have to maintain two different sets of files for nearly
+ identical boards.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1bbf5eae322f5f1f6427ecc3ac13a0cb7dba8ad6
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 30 15:01:49 2007 +0100
+
+ [PATCH] Update Prodrive SCPU (PDNB3 variant) board
+
+ SCPU doesn't use redundant environment in flash.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6304430ed642ea8fa15c9e5af965ac2e033eec45
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jan 30 12:51:07 2007 +0100
+
+ [PATCH] alpr: Update alpr board config file
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f8db84f132b1e335f20f96138a1f09ed97b08664
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Jan 30 00:50:40 2007 +0100
+
+ LPC2292 SODIMM port coding style cleanup.
+
+commit 6bd2447ee47ee23c18d2b3c7ccd5a20f7626f5b3
+Author: Gary Jennejohn <garyj@pollux.denx.de>
+Date: Wed Jan 24 12:16:56 2007 +0100
+
+ Add port for the lpc2292sodimm evaluation board from EmbeddedArtists
+
+commit 2daf046ba627f85f44195815778140039636244e
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Jan 23 17:22:06 2007 +0100
+
+ [iDMR] Add MTD and JFFS2 support, also add default partition definition.
+
+commit f7db33101fbc9c8f0a10738ce87034875a17aeb9
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Jan 23 14:21:14 2007 +0100
+
+ [iDMR] Flash driver on initialisation write-protects some sectors,
+ currently sectors 0-3. Sector 3 does not need to be protected, though
+ (U-boot occupies sectors 0-1 and the environment sector 2). This commit
+ fixes this, i.e., only sectors 0-2 are protected.
+
+commit 0ed47bb119cd2c4c16edb2548789148f9e6dc9de
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Jan 23 14:11:22 2007 +0100
+
+ [iDMR] Using MII-related commands on iDRM board doesn't work now (e.g.,
+ "mii device" results in "Unexpected exception"). Fixing this properly
+ requires some clean-up in the FEC drivers infrastructure for ColdFire, so
+ this commit disables MII commads for now.
+
+commit 363d1d8f9c99b63daef81f5985cab3fc00edde5c
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Jan 23 13:25:22 2007 +0100
+
+ [ColdFire MCF5271 family] Add CPU detection based on the value of Chip
+ Identification Register (CIR).
+
+commit fdef388758506765d4d6a7155c8f1584c63ff581
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Mon Jan 22 13:19:21 2007 +0800
+
+ use CFG_WRITE_SWAPPED_DATA define instead of define CFG_FLASH_CFI_SWAP
+ The patch by Heiko Schocher <hs@pollux.denx.de> on Jan, 19, 2007
+ fixes cfi_driver bug for mpc7448hpc2 board. The default cfi_driver can support
+ mpc7448hpc2 board.
+
+commit a4012396645533aef218354eeba754dff0deace8
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Fri Jan 19 23:08:39 2007 +0100
+
+ Minor code cleanup.
+
+commit f539b7ba7d7ef6dd187c8209609001cb1cd95e39
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Jan 19 19:57:10 2007 +0100
+
+ [PATCH] SC3 board: added CFG_CMD_AUTOSCRIPT.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit d0b6e14087ddd8789f224a48e1d33f2a5df4d167
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Jan 19 18:05:26 2007 +0100
+
+ [PATCH] CFI: define CFG_WRITE_SWAPPED_DATA for the CFI-Flash driver
+ if you must swap the bytes between reading/writing.
+ (Needed for the SC3 board)
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 9d8d5a5bfb64768f29a0cb47fc37cd6f4c40e276
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 18 16:05:47 2007 +0100
+
+ [PATCH] Add support for Prodrive SCPU (PDNB3 variant) board
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0057d758e3e874cbe7f24745d0cce8c1cb6c207e
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 18 11:54:52 2007 +0100
+
+ [PATCH] Update Prodrive P3Mx support
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 34167a36c29ee946b727465db5c014746a08e978
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 18 11:48:10 2007 +0100
+
+ [PATCH] Add missing Taishan config file
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cb4820725e9fc409c5cbc8e83054a6ed522d2111
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Thu Jan 18 11:28:51 2007 +0100
+
+ [PATCH] Fix: Compilerwarnings for SC3 board.
+ The EBC Configuration Register is now by CFG_EBC_CFG definable
+ Added JFFS2 support for the SC3 board.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 5fb692cae57d1710c8f52a427cf7f39a37383fcd
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jan 18 10:25:34 2007 +0100
+
+ [PATCH] Add support for AMCC Taishan PPC440GX eval board
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6d3e0107235aa0e6a6dcb77f9884497280bf85ad
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Jan 16 18:30:50 2007 +0100
+
+ Raname solidcard3 into sc3; add redundant env for sc3
+
+commit 1bbbbdd20fcec9933697000dcf55ff7972622596
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Tue Jan 16 12:46:35 2007 +0100
+
+ Update default environment for Solidcard3
+
+commit 5a5c56986a9ccf71642c8b6374eb18487b15fecd
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jan 15 09:46:29 2007 +0100
+
+ [PATCH] Fix 440SPe rev B detection from previous patch
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a443d31410c571ee8f970da819a44d698fdd6b1f
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Sun Jan 14 13:35:31 2007 +0100
+
+ [FIX] correct I2C Writes for the LM81 Sensor.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 0bba5452835f19a61204edcda3a58112fd8e2208
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sat Jan 13 11:17:10 2007 +0100
+
+ Undo commit 3033ebb2: reset command does not take any arguments
+
+ Haiying Wang's modification to the reset command was broken, undo it.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 95981778cff0038fd9941044d6a3eda810e33258
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 13 08:01:03 2007 +0100
+
+ [PATCH] Update 440SP(e) cpu revisions
+
+ Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 77ddc5b9afb325262fd88752ba430a1dded1f0c7
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 13 07:59:56 2007 +0100
+
+ [PATCH] Update Yellowstone (440GR) to display board rev and PCI bus speed
+
+ Now the board revision and the current PCI bus speed are printed after
+ the board message.
+
+ Also the EBC initialising is now done via defines in the board config
+ file.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 36adff362c2c0141ff8a810d42a7e478f779130f
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 13 07:59:19 2007 +0100
+
+ [PATCH] Update Yosemite (440EP) to display board rev and PCI bus speed
+
+ Now the board revision and the current PCI bus speed are printed after
+ the board message.
+
+ Also the EBC initialising is now done via defines in the board config
+ file.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e0b9ea8c8a294de6a5350ae638879d24b5b709d6
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 13 07:57:51 2007 +0100
+
+ [PATCH] Update Sequoia (440EPx) to display board rev and PCI bus speed
+
+ Now the board revision and the current PCI bus speed are printed after
+ the board message.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ca43ba18e910206ef8063e4b22d282630bff3fd2
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Thu Jan 11 15:44:44 2007 +0100
+
+ Added support for the SOLIDCARD III board from Eurodesign
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 6abaee42621c07e81a2cd189ad4368b5e8c50280
+Author: Reinhard Thies <Reinhard.Thies@web.de>
+Date: Wed Jan 10 14:41:14 2007 +0100
+
+ Adjusted default environment for cam5200 board.
+
+commit bab5a90d4ccc1a46a8127b867fa59028cc623ad9
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Jan 10 15:35:52 2007 +0100
+
+ Update CHANGELOG
+
+commit 787fa15860a57833e50bd30555079a9cd4e519b8
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Jan 10 01:28:39 2007 +0100
+
+ Fix auto_update for MCC200 board.
+
+ The invocation of do_auto_update() is moved to the end of the
+ misc_init_r() function, after the flash mappings have been
+ initialized. Please find attached a patch that implements that
+ change.
+
+ Also correct the decoding of the keypad status. With this update, the
+ key that will trigger the update is Column 2, Row 2.
+
+commit d9384de2f571046e71081bae22b49e3d5ca2e3d5
+Author: Marian Balakowicz <m8@semihalf.com>
+Date: Wed Jan 10 00:26:15 2007 +0100
+
+ CAM5200 flash driver modifications:
+ - use CFI driver (replaces custom flash driver) for main 'cam5200' target
+ - add second build target 'cam5200_niosflash' which still uses custom driver
+
+commit 67fea022fa957f59653b5238c7496f80a6b70432
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 16:02:48 2007 +0100
+
+ SPC1920: cleanup memory contoller setup
+
+commit 8fc2102faa23593c80381437c09f7745a14deb40
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 14:57:14 2007 +0100
+
+ Fix the cpu speed setup to work with all boards.
+
+commit 9295acb77481cf099ef9b40e1fa2d145b3c7490c
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 14:57:13 2007 +0100
+
+ SPC1920: add support for the FM18L08 Ramtron FRAM
+
+commit 38ccd2fdf3364a53fe80e9b365303ecdafc9e223
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 14:57:13 2007 +0100
+
+ SPC1920: update the HPI register addresses to work with the second
+ generation of hardware
+
+commit 5921e5313fc3eadd42770c2b99badd7fae5ecf1e
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:13 2007 +0100
+
+ Miscellanious spc1920 related cleanups
+
+commit e4c2d37adc8bb1bf69dcf600cbc6c75f916a6120
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Jan 9 14:57:12 2007 +0100
+
+ SPC1920 GO/NOGO led should be set to color red in U-Boot
+
+commit 0be62728aac459ba268d6d752ed49ec0e2bc7348
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:12 2007 +0100
+
+ Add support for the DS3231 RTC
+
+commit 8139567b60d678584b05f0718a681f2047c5e14f
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:11 2007 +0100
+
+ SMC1 uses external CLK4 instead of BRG on spc1920
+
+commit d8d9de1a02fbd880b613d607143d1f57342affc7
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:10 2007 +0100
+
+ Update the SPC1920 CMB PLD driver
+
+commit 3f34f869162750e5e999fd140f884f5de952bcfe
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:10 2007 +0100
+
+ Add / enable I2C support on the spc1920 board
+
+commit d28707dbce1e9ac2017ad051da4133bf22b4204f
+Author: Markus Klotzbuecher <mk@creamnet.de>
+Date: Tue Jan 9 14:57:10 2007 +0100
+
+ Add support for the tms320671x host port interface (HPI)
+
+commit f4eb54529bb3664c3a562e488b460fe075f79d67
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sun Jan 7 00:13:11 2007 +0100
+
+ Prepare for release 1.2.0
+
+commit f07ae7a9daef27a3d0213a4f3fe39d5342173c02
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 6 15:58:09 2007 +0100
+
+ [PATCH] 44x: Fix problem with DDR controller setup (refresh rate)
+
+ This patch fixes a problem with an incorrect setup for the refresh
+ timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f16c1da9577f06c5fc08651a4065537407de4635
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Jan 6 15:56:13 2007 +0100
+
+ [PATCH] Update ALPR board files
+
+ This update brings the ALPR board support to the newest version.
+ It also fixes a problem with the NAND driver.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cd1d937f90250a32988c37b2b4af8364d25de8ed
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jan 5 11:46:05 2007 +0100
+
+ [PATCH] nand: Fix problem with oobsize calculation
+
+ Here the description from Brian Brelsford <Brian_Brelsford@dell.com>:
+
+ The Hynix part returns a 0x1d in the 4th ID byte. The Samsung part
+ returns a 0x15. In the code fragment below bits [1:0] determine the
+ page size, it is ANDed via "(extid & 0x3)" then shifted out. The
+ next field is also ANDed with 0x3. However this is a one bit field
+ as defined in the Hynix and Samsung parts in the 4th ID byte that
+ determins the oobsize, not a two bit field. It works on Samsung as
+ bits[3:2] are 01. However for the Hynix there is a 11 in these two
+ bits, so the oob size gets messed up.
+
+ I checked the correct linux code and the suggested fix from Brian is
+ also available in the linux nand mtd driver.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a78bc443ae5a4a8ba87590587d5e35bf5a787b2e
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jan 5 10:40:36 2007 +0100
+
+ [PATCH] Clear PLB4A0_ACR[WRP] on Sequoia (440EPx)
+
+ This fix will make the MAL burst disabling patch for the Linux
+ EMAC driver obsolete.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 023889838282b6237b401664f22dd22dfba2c066
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jan 5 10:38:05 2007 +0100
+
+ [PATCH] Add DDR2 optimization code for Sequoia (440EPx) board
+
+ This code will optimize the DDR2 controller setup on a board specific
+ basis.
+
+ Note: This code doesn't work right now on the NAND booting image for the
+ Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cce4acbb68398634b8d011ed7bb0d12269c84230
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Thu Dec 28 19:08:21 2006 +0100
+
+ Few V38B changes:
+ - fix a typo in V38B config file
+ - move watchdog initialisation earlier in the boot process
+ - add "wdt=off" to default kernel command line (disables kernel watchdog)
+
+commit 92eb729bad876725aeea908d2addba0800620840
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Dec 27 01:26:13 2006 +0100
+
+ Fix bug in adaption of Stefano Babic's CFI driver patch.
+
+commit 9c0f42ecfe25f7ffce8ec7a815f03864d723ffe3
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sun Dec 24 01:42:57 2006 +0100
+
+ Minor code cleanup.
+
+commit d784fdb05900ada3686d5778783e1fb328e9fb66
+Author: Stefano Babic <sbabic@denx.de>
+Date: Tue Dec 12 00:22:42 2006 +0100
+
+ Fix cfi failure with Spansion Flash (Spansion Flash Devices have a different offset to go into CFI mode)
+
+commit 1b3c360c235dc684ec06c2d5f183f0a282ce45e2
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Dec 22 14:29:40 2006 +0100
+
+ [PATCH] Fix sequoia flash autodetection (finally correct)
+
+ Now 32MByte and 64MByte FLASH is know to work and other
+ configurations should work too.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 82e5236a8b719543643fd26d5827938ab2b94818
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Fri Dec 22 10:30:26 2006 +0100
+
+ Minor code cleanup; update CHANGELOG.
+
+commit fa23044564091f05d9695beb7b5b9a931e7f41a4
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Thu Dec 21 17:17:02 2006 +0100
+
+ Added support for the TQM8272 board from TQ
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 6dedf3d49dd14c3bf541c8ecee7ffaac5f0e1d6c
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Thu Dec 21 16:14:48 2006 +0100
+
+ [PATCH] Add support for the UC101 board from MAN.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit c84bad0ef60e7055ab0bd49b93069509cecc382a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Dec 20 00:29:43 2006 +0100
+
+ Fix to make the baudrate changes immediate for the MCF52x2 family.
+
+commit daa6e418bcc0c717752e8de939c213c790286096
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Dec 20 00:27:32 2006 +0100
+
+ Preliminary support for the iDMR board (ColdFire).
+
+commit cdb97a6678826f85e7c69eae6a1c113d034c9b10
+Author: Andrei Safronov <safronov@pollux.denx.de>
+Date: Fri Dec 8 16:23:08 2006 +0100
+
+ automatic update mechanism
+
+commit 9d27b3a0685ff99fc477983f315c04d49f657a8a
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Mon Dec 4 17:56:59 2006 +0800
+
+ Slight code clean up.
+ Add comments, delete duplicate define and remove spaces.
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 4dbcd69e3e2776ea334590d5768e3692c5fae5c1
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Mon Dec 4 17:54:21 2006 +0800
+
+ Introduce PLL_CFG[0:4] table for processor 7448/7447A/7455/7457. The original
+ multiplier table can not refect the real PLL clock behavior of these
+ processors. Please refer to the hardware specification for detailed
+ information of the corresponding processors.
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 4efe20c9579011d9987f62ed7d35ee8cdc1cf0e0
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Mon Dec 4 14:46:23 2006 +0800
+
+ Remove the static MAC address, ip address, server ip, netmask and
+ gateway ip for network setting.
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 6f12c61cf31ed73d72ddfcfc712a854a3a177aaf
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Mon Dec 4 14:33:08 2006 +0800
+
+ Remove the duplicate memory test code for mpc744ihpc2 board.
+ If a memory test is needed, please use the functions in
+ post/memory.c or memtest command.
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit c9c1eeed7dd193fa65fb194654132040d49d4d3a
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Fri Dec 1 19:01:25 2006 +0800
+
+ Fix the exception occuring in RAM table search issue.
+ The original search_one_table() function code can only processes the search
+ for the exception occurring in FLASH/ROM, because the exception and fixup
+ table usually locate in FLASH. If the exception address is also in
+ FLASH, it will be OK.
+ If the exception occurs in RAM, after the u-boot relocation, a
+ relocation offset should be added.
+
+ clean up the code in cpu/74xx_7xx/cpu.c
+
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit ee311214e0d216f904feea269599d0934bf71f23
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Fri Dec 1 11:47:36 2006 +0800
+
+ Clean up the code according to codestyle:
+ (1) remove some C++ comments.
+ (2) remove trailing white space.
+ (3) remove trailing empty line.
+ (4) Indentation by table.
+ (5) remove {} in one line condition.
+ (6) add space before '(' in function call.
+ Remove some weird printf () output.
+ Add necessary comments.
+ Modified Makefile to support building in a separate directory.
+
+commit dd520bf314c7add4183c5191692180f576f96b60
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Nov 30 18:02:20 2006 +0100
+
+ Code cleanup.
+
+commit 8d9a8610b8256331132227e9e6585c6bd5742787
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Nov 30 01:54:07 2006 +0100
+
+ Code cleanup. Update CHANGELOG.
+
+commit 726e90aacf0b1ecb0e7055be574622fbe3e450ba
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Wed Nov 29 16:23:42 2006 +0100
+
+ [PATCH] [MPC52xx] Use IPB bus frequency for SOC peripherals
+
+ The soc node of the mpc52xx needs to be loaded with the IPB bus frequency,
+ not the XLB frequency.
+
+ This patch depends on the previous patches for MPC52xx device tree support
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+ Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
+
+commit 1eac2a71417b6675b11aace72102a2e7fde8f5c6
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 29 15:42:37 2006 +0100
+
+ [PATCH] Add support for Prodrive P3M750 & P3M7448 (P3Mx) boards
+
+ This patch adds support for the Prodrive P3M750 (PPC750 & MV64460)
+ and the P3M7448 (MPC7448 & MV64460) PMC modules. Both modules are
+ quite similar and share the same board directory "prodrive/p3mx"
+ and the same config file "p3mx.h".
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1bdd46832aeb569f5e04b1f20f64318525b6525a
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 29 12:53:15 2006 +0100
+
+ [PATCH] common/cmd_elf.c: Enable loadaddr as parameter in bootvx command
+
+ In the bootvx command the load address was only read from the env
+ variable "loadaddr" and not optionally passed as paramter as described
+ in the help. This is fixed with this patch. The behaviour is now the
+ same as in the bootelf command.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4e26f1074c3ac1bd8fd094f0dc4a1c4a0b15a592
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 29 12:03:57 2006 +0100
+
+ [PATCH] include/ppc440.h minor error affecting interrupts
+
+ Fixed include/ppc440.c for UIC address Bug
+
+ Corrects bug affecting the addresses for the universal interrupt
+ controller UIC2 and UIC3 on the PPC440 Epx, GRx, and SPE chips.
+
+ Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1939d969443ccf316cab2bf32ab1027d4db5ba1a
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Tue Nov 28 16:17:27 2006 -0600
+
+ Make fsl-i2c not conflict with SOFT I2C
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 14198bf768fdc958e3c1afd2404e5262208e98d7
+Author: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+Date: Tue Nov 28 16:17:18 2006 -0600
+
+ Fix I2C master address initialization.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit cf3d045e51ca8dcc6cf759827140861d6ac25c04
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Nov 28 23:31:19 2006 -0600
+
+ Assign maintainers for mpc8349emds and mpc8360emds
+
+ Dave for mpc8360emds, and me for mpc8349emds.
+
+commit 1aa934c81b77f2080d3ca4b226eab67b17a33961
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Nov 28 23:28:33 2006 -0600
+
+ Eliminate gcc 4 'used uninitialized' warnings in drivers/qe/uccf.c
+
+ give initial values for reg_num, shift, p_cmxucr in ucc_set_clk_src
+ since they are passed by reference to ucc_get_cmxucr_reg and assigned.
+
+commit e857a5bdb3954b896c0920cb9d8d2b1b9c107ce5
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Nov 28 12:09:35 2006 -0600
+
+ mpc83xx: Miscellaneous code style fixes
+
+ Implement various code style fixes and similar changes.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit e59581c56ab5d6e0207ddac3b2c1d55cb36ec706
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 28 17:55:49 2006 +0100
+
+ [PATCH] Enable the IceCube/lite5200 variants to pass a device tree to Linux.
+
+ This patch adds the code and configuration necessary to boot with an
+ arch/powerpc Linux kernel.
+
+ Signed-off-by: Grant Likely <grant.likely@gmail.com>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit e732faec95a83cb468b4850ae807c8301dde8f6a
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 28 16:09:24 2006 +0100
+
+ [PATCH] PPC4xx: 440SP Rev. C detection added
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e7f3e9ff01fbd7fa72eb42a9675fbed6bc4736b0
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 28 11:04:45 2006 +0100
+
+ [PATCH] nand: Fix patch merge problem
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 58e3b14c18ed3288ceef8d086946dbf3df64ccf2
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Nov 28 11:04:45 2006 +0100
+
+ [PATCH] nand: Fix patch merge problem
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4f4b602ec7524a032bdf3c6d28c7f525a4a67eaa
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Nov 27 22:53:53 2006 +0100
+
+ Update CHANGELOG
+
+commit f6e495f54cdb8fe340b9c03deab40ad746d52fae
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 17:43:25 2006 +0100
+
+ [PATCH] 4xx_enet.c: Correct the setting of zmiifer register
+
+ Patch below corrects the setting of the zmiifer register, it was
+ overwritting the register rather than ORing the settings.
+
+ Signed-off-by: Neil Wilson <NWilson@airspan.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d1a72545296800b7e219f93104ad5836f0003d66
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 17:34:10 2006 +0100
+
+ [PATCH] Select NAND embedded environment from board configuration
+
+ The current NAND Bootloader setup forces the environment
+ variables to be in line with the bootloader. This change
+ enables the configuration to be made in the board include
+ file instead so that it can be individually enabled.
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 15784862857c3c2214498defcfed84ff137fb81e
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 17:22:19 2006 +0100
+
+ [PATCH] nand_wait() timeout fixes
+
+ Two fixes for the nand_wait() function in
+ drivers/nand/nand_base.c:
+
+ 1. Use correct timeouts. The original timeouts in Linux
+ source are 400ms and 20ms not 40s and 20s
+
+ 2. Return correct error value in case of timeout. 0 is
+ interpreted as OK.
+
+ Signed-off-by: Rui Sousa <rui.sousa@laposte.net>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit da5553b095bf04f4f109ad7e565dae3aba47b230
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 17:04:06 2006 +0100
+
+ [PATCH] Allow CONFIG_OF_FLAT_TREE to boot a non-arch/powerpc kernel
+
+ This patch allows an arch/ppc kernel to be booted by just passing 1 or 2
+ arguments to bootm. It removes the getenv("disable_of") test that used
+ to be used for this purpose.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit a9398e018593782c5fa7d0741955fc1256b34c1e
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Nov 27 15:32:42 2006 +0100
+
+ Minor code cleanup. Update CHANGELOG.
+
+commit 1729b92cde575476684bffe819d0b7791b57bff2
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:52:04 2006 +0100
+
+ [PATCH] 4xx: Fix problem with board specific reset code (now for real)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cc5ee8a92a0e3ca6f727af71b8fd206460c7afd7
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:49:51 2006 +0100
+
+ [PATCH] alpr: remove unused board specific flash driver
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1f94d162e2b5f0edc28d9fb11482502c44d218e1
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:48:41 2006 +0100
+
+ [PATCH] 4xx: Fix problem with board specific reset code
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ec0c2ec725aec9524a177a77ce75559e644a931a
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:46:06 2006 +0100
+
+ [PATCH] Remove testing 4xx enet PHY setup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1c2ce2262069510f31c7d3fd7efd3d58b8c0c148
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 27 14:12:17 2006 +0100
+
+ [PATCH] Update Prodrive ALPR board support (440GX)
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 78d620ebb5871d252270dedfad60c6568993b780
+Author: Wolfgang Denk <wd@atlas.denx.de>
+Date: Thu Nov 23 22:58:58 2006 +0100
+
+ Updates for TQM5200 modules:
+ - fix off-by-one error in board/tqm5200/cam5200_flash.c error message
+ - simplify "udate" definitions
+
+commit 2053283304eeddf250d109e6791eb6fa4cad14f7
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Nov 22 13:20:50 2006 +0100
+
+ [PATCH] PPC4xx start.S: Fix for processor errata
+
+ Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx
+ errata 1.12: 440_33 by moving patch up in code.
+
+ Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4ef6251403f637841000e0fef9e832aa01339822
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 20 20:39:52 2006 +0100
+
+ [PATCH] Update AMCC Sequoia config file to support 64MByte NOR FLASH
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e4bbd8da164b976d38616bd9c69c5e86e193cdf0
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Nov 20 10:28:30 2006 +0100
+
+ Update CHANGELOG
+
+commit 260421a21e934a68d31fb6125b0fbd2631a8ca20
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Nov 13 13:55:24 2006 +0100
+
+ [PATCH] CFI driver AMD Command Set Top boot geometry reversal, etc. [Updated]
+
+ * Adds support for AMD command set Top Boot flash geometry reversal
+ * Adds support for reading JEDEC Manufacturer ID and Device ID
+ * Adds support for displaying command set, manufacturer id and
+ device ids (flinfo)
+ * Makes flinfo output to be consistent when CFG_FLASH_EMPTY_INFO defined
+ * Removes outdated change history (refer to git log instead)
+
+ Signed-off-by: Tolunay Orkun <listmember@orkun.us>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b21b511d4c50408f4853f46f06b601272196223f
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sun Nov 12 21:13:23 2006 +0100
+
+ Update CHANGELOG
+
+commit ce3f1a40c507afbab06c5eb58ccdc6713eda3245
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sat Nov 11 22:48:22 2006 +0100
+
+ Disable the watchdog in the default config for the V38B board.
+
+commit 44a47e6db2694841211f1c8fdbafd36992e9cd1a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sat Nov 11 22:43:00 2006 +0100
+
+ Change the GPIO pin multiplexing configuration for V38B. The USB GPIO pin
+ group is enabled for USB earlier (in cpu_init_f() instead of
+ usb_lowlevel_init()).
+
+commit 91650b3e4de688038d4f71279c44858e3e2c6870
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Nov 6 17:06:36 2006 +0100
+
+ Sequential accesses to non-existent memory must be synchronized,
+ at least on G2 cores.
+
+ This fixes get_ram_size() problems on MPC5200 Rev. B boards.
+
+commit be5e61815d5a1fac290ce9c0ef09cb6a8e4288fa
+Author: Timur Tabi <timur@freescale.com>
+Date: Fri Nov 3 19:15:00 2006 -0600
+
+ mpc83xx: Update 83xx to use fsl_i2c.c
+
+ Update the 83xx tree to use I2C support in drivers/fsl_i2c.c. Delete
+ cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
+ Added multiple I2C bus support to fsl_i2c.c.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit d239d74b1c937984bc519083a8e7de373a390f06
+Author: Timur Tabi <timur@freescale.com>
+Date: Fri Nov 3 12:00:28 2006 -0600
+
+ mpc83xx: Replace CFG_IMMRBAR with CFG_IMMR
+
+ Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
+ tree matches the other 8xxx trees.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit f7fb2e703ec9688541416962724adff70a7322cb
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Nov 2 19:47:11 2006 -0600
+
+ mpc83xx: Lindent and clean up cpu/mpc83xx/speed.c
+
+commit 90f30a710a3c619b5405860a686c4ddfc495d4b6
+Author: Dave Liu <daveliu@freescale.com>
+Date: Thu Nov 2 18:05:50 2006 -0600
+
+ mpc83xx: Fix the incorrect dcbz operation
+
+ The 834x rev1.x silicon has one CPU5 errata.
+
+ The issue is when the data cache locked with
+ HID0[DLOCK], the dcbz instruction looks like no-op inst.
+
+ The right behavior of the data cache is when the data cache
+ Locked with HID0[DLOCK], the dcbz instruction allocates
+ new tags in cache.
+
+ The 834x rev3.0 and later and 8360 have not this bug inside.
+
+ So, when 834x rev3.0/8360 are working with ECC, the dcbz
+ instruction will corrupt the stack in cache, the processor will
+ checkstop reset.
+
+ However, the 834x rev1.x can work with ECC with these code,
+ because the sillicon has this cache bug. The dcbz will not
+ corrupt the stack in cache.
+ Really, it is the fault code running on fault sillicon.
+
+ This patch fix the incorrect dcbz operation. Instead of
+ CPU FP writing to initialise the ECC.
+
+ CHANGELOG:
+ * Fix the incorrect dcbz operation instead of CPU FP
+ writing to initialise the ECC memory. Otherwise, it
+ will corrupt the stack in cache, The processor will checkstop
+ reset.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit bf0b542d6773a5a1cbce77691f009b06d9aeb57d
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Nov 1 00:10:40 2006 -0600
+
+ mpc83xx: add OF_FLAT_TREE bits to 83xx boards
+
+ add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and
+ STDOUT_PATH configuration bits to mpc8349emds,
+ mpc8349itx, and mpc8360emds board code.
+
+ redo environment to use bootm with the fdtaddr
+ for booting ARCH=powerpc kernels by default,
+ and provide default fdtaddr values.
+
+commit 48041365b3420589ad464ebc7752e0053538b729
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Nov 1 00:07:25 2006 -0600
+
+ mpc83xx: change ft code to modify local-mac-address property
+
+ Update 83xx OF code to update local-mac-address properties
+ for ethernet instead of the obsolete 'address' property.
+
+commit 9ca880a250870a7d55754291b5591d2b5fe89b54
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Oct 31 21:23:16 2006 -0600
+
+ mpc83xx: Fix dual I2C support for the MPC8349ITX, MPC8349EMDS, TQM834x, and MPC8360EMDS
+
+ This patch also adds an improved I2C set_speed(), which handles all clock
+ frequencies.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit ac4b5622ce050b5ee1e154b98df630d778661632
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 31 19:54:59 2006 -0600
+
+ mpc83xx: add the README.mpc8360emds
+
+ add doc/README.mpc8360emds to accompany the new board support
+
+commit 7737d5c658c606f999dfbe3e86b0fed49e5c50ef
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 3 12:11:15 2006 -0600
+
+ mpc83xx: add QE ethernet support
+
+ this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
+
+commit 5f8204394e39bbe8cd9f08b8f8d145b6c01f7c73
+Author: Dave Liu <daveliu@freescale.com>
+Date: Fri Nov 3 19:33:44 2006 -0600
+
+ mpc83xx: Add MPC8360EMDS basic board support
+
+ Add support for the Freescale MPC8360EMDS board.
+ Includes DDR, DUART, Local Bus, PCI.
+
+commit 23892e49352de74f7fac36ff90bb1be143d195e3
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 31 19:30:40 2006 -0600
+
+ mpc83xx: add the QUICC Engine (QE) immap file
+
+ common QE immap file. Also required for 8360.
+
+commit b701652a4992bdcc62fb1a6038a85beef9e55da4
+Author: Dave Liu <daveliu@freescale.com>
+Date: Tue Oct 31 19:25:38 2006 -0600
+
+ mpc83xx: Add 8360 specifics to 83xx immap
+
+ Mainly add QE device dependencies, with appropriate 8360 protection.
+ Lindent also run.
+
+commit 988833324a7fda482c8ac3ca23eb539f8232e404
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Oct 31 19:14:41 2006 -0600
+
+ mpc83xx: Fix PCI, USB, bootargs for MPC8349E-mITX
+
+ PREREQUISITE PATCHES:
+
+ * This patch can only be applied after the following patches have been applied:
+
+ 1) DNX#2006092142000015 "Add support for the MPC8349E-mITX 1/2"
+ 2) DNX#2006092142000024 "Add support for the MPC8349E-mITX 2/2"
+
+ CHANGELOG:
+
+ * For the 8349E-mITX, fix some size values in pci_init_board(), enable
+ the clock for the 2nd USB board (Linux kernel will hang otherwise),
+ and fix the CONFIG_BOOTARGS macro.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 2ad6b513b31070bd0c003792ed1c3e7f5d740357
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Oct 31 18:44:42 2006 -0600
+
+ mpc83xx: Add support for the MPC8349E-mITX
+
+ PREREQUISITE PATCHES:
+
+ * This patch can only be applied after the following patches have been applied:
+
+ 1) DNX#2006090742000024 "Add support for multiple I2C buses"
+ 2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
+ 3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
+ 4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
+ 5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"
+
+ CHANGELOG:
+
+ * Add support for the Freescale MPC8349E-mITX reference design platform.
+ The second TSEC (Vitesse 7385 switch) is not supported at this time.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 183da6d9b446cc12123455844ad1187e2375626f
+Author: Ben Warren <bwarren@qstreams.com>
+Date: Tue Sep 12 10:15:53 2006 -0400
+
+ Additional MPC8349 support for multibus i2c
+
+ Hello,
+
+ Here is a patch for a file that was accidentally left out of a previous
+ attempt.
+
+ It accompanies the patch with ticket DNX#2006090742000024
+
+ CHANGELOG:
+ Change PCI initialization to use new multi-bus I2C API.
+
+ regards,
+ Ben
+
+commit b24f119d672b709d153ff2ac091d4aa63ec6877d
+Author: Ben Warren <bwarren@qstreams.com>
+Date: Thu Sep 7 16:51:04 2006 -0400
+
+ Multi-bus I2C implementation of MPC834x
+
+ Hello,
+
+ Attached is a patch implementing multiple I2C buses on the MPC834x CPU
+ family and the MPC8349EMDS board in particular.
+ This patch requires Patch 1 (Add support for multiple I2C buses).
+ Testing was performed on a 533MHz board.
+
+ /*** Note: This patch replaces ticket DNX#2006083042000027 ***/
+
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+ CHANGELOG:
+ Implemented driver-level code to support two I2C buses on the
+ MPC834x CPU family and the MPC8349EMDS board. Available I2C bus speeds
+ are 50kHz, 100kHz and 400kHz on each bus.
+
+ regards,
+ Ben
+
+commit bb99ad6d8257bf828f150d40f507b30d80a4a7ae
+Author: Ben Warren <bwarren@qstreams.com>
+Date: Thu Sep 7 16:50:54 2006 -0400
+
+ Add support for multiple I2C buses
+
+ Hello,
+
+ Attached is a patch providing support for multiple I2C buses at the
+ command level. The second part of the patch includes an implementation
+ for the MPC834x CPU and MPC8349EMDS board.
+
+ /*** Note: This patch replaces ticket DNX#2006083042000018 ***/
+
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+ Overview:
+
+ 1. Include new 'i2c' command (based on USB implementation) using
+ CONFIG_I2C_CMD_TREE.
+
+ 2. Allow multiple buses by defining CONFIG_I2C_MULTI_BUS. Note that
+ the commands to change bus number and speed are only available under the
+ new 'i2c' command mentioned in the first bullet.
+
+ 3. The option CFG_I2C_NOPROBES has been expanded to work in multi-bus
+ systems. When CONFIG_I2C_MULTI_BUS is used, this option takes the form
+ of an array of bus-device pairs. Otherwise, it is an array of uchar.
+
+ CHANGELOG:
+ Added new 'i2c' master command for all I2C interaction. This is
+ conditionally compiled with CONFIG_I2C_CMD_TREE. New commands added for
+ setting I2C bus speed as well as changing the active bus if the board
+ has more than one (conditionally compiled with
+ CONFIG_I2C_MULTI_BUS). Updated NOPROBE logic to handle multiple buses.
+ Updated README.
+
+ regards,
+ Ben
+
+commit bed85caf872714ebf53013967a695c9d63acfc68
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Oct 31 18:13:36 2006 -0600
+
+ mpc83xx: Add support for Errata DDR6 on MPC 834x systems
+
+ CHANGELOG:
+
+ * Errata DDR6, which affects all current MPC 834x processors, lists changes
+ required to maintain compatibility with various types of DDR memory. This
+ patch implements those changes.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit afd6e470f639883002c7c59d562690a5cb0f4865
+Author: Timur Tabi <timur@freescale.com>
+Date: Wed Oct 25 18:45:23 2006 -0500
+
+ mpc83xx: fix TQM build by defining a CFG_FLASH_SIZE for it
+
+commit 31068b7c4abeefcb2c8fd4fbeccc8ec6c6d0475a
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Aug 22 17:07:00 2006 -0500
+
+ mpc83xx: Add support for variable flash memory sizes on 83xx systems
+
+ CHANGELOG:
+
+ * On 83xx systems, use the CFG_FLASH_SIZE macro to program the LBC local access
+ window registers, instead of using a hard-coded value of 8MB.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit 2fc34ae66e73fa7841d1a006dc1b5dcbc1f78965
+Author: Tanya Jiang <tanya.jiang@freescale.com>
+Date: Thu Aug 3 18:38:13 2006 +0800
+
+ mpc83xx: Unified TQM834x variable names with 83xx and consolidated macros
+
+ Unified TQM834x variable names with 83xx and consolidated macro
+ in preparation for the 8360 and other upcoming 83xx devices.
+
+ Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
+
+commit f6eda7f80ccc13d658020268c507d7173cf2e8aa
+Author: Dave Liu <daveliu@freescale.com>
+Date: Wed Oct 25 14:41:21 2006 -0500
+
+ mpc83xx: Changed to unified mpx83xx names and added common 83xx changes
+
+ Incorporated the common unified variable names and the changes in preparation
+ for releasing mpc8360 patches.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 3894c46c27c64891f93ac04edde86a9fa9758d92
+Author: Tanya Jiang <tanya.jiang@freescale.com>
+Date: Thu Aug 3 18:36:02 2006 +0800
+
+ mpc83xx: Fix missing build for mpc8349emds pci.c
+
+ Make pci build for mpc8349emds
+
+ Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
+
+commit 09a81ff740b29deea1e2ab08a3c2ac136c2e6219
+Author: Tanya Jiang <tanya.jiang@freescale.com>
+Date: Thu Aug 3 18:39:49 2006 +0800
+
+ mpc83xx: Removed unused file resetvec.S for mpc83xx cpu
+
+ Removed unused file resetvec.S for mpc83xx cpu
+
+ Signed-off-by: Tanya Jiang <tanya.jiang@freescale.com>
+
+commit 04f899fc465c3e44f2b55ecc70618f5696fc0ddf
+Author: Nick Spence <Nick.Spence@freescale.com>
+Date: Sat Sep 30 00:32:59 2006 -0700
+
+ NAND Flash verify across block boundaries
+
+ This patch addresses a problem when CONFIG_MTD_NAND_VERIFY_WRITE is
+ defined
+ and the write crosses a block boundary. The pointer to the verification
+ buffer (bufstart) is not being updated to reflect the starting of the
+ new
+ block so the verification of the second block fails.
+
+ CHANGELOG:
+
+ * Fix NAND FLASH page verification across block boundaries
+
+commit f484dc791a3932537213c43c654cc1295c64b84c
+Author: Nick Spence <nick.spence@freescale.com>
+Date: Thu Sep 7 07:39:46 2006 -0700
+
+ Added RGMII support to the TSECs and Marvell 881111 Phy
+
+ Added a phy initialization to adjust the RGMII RX and TX timing
+ Always set the R100 bit in 100 BaseT mode regardless of the TSEC mode
+
+ Signed-off-by: Nick Spence <nick.spence@freescale.com>
+
+commit 4831c8b8a97799da77923d6bbb4c260c0d45521c
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Fri Nov 3 13:10:00 2006 +0800
+
+ Remove some unused CFG define.
+ undef CFG_DRAM_TEST
+
+commit 99c09c4dec34f77c243bf51bea532e3f339410ad
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Fri Nov 3 13:07:36 2006 +0800
+
+ Change the TEXT_BASE from 0xFFF00000 to 0xFF000000.
+ Both work. 0xFF000000 seems more reasonable.
+
+commit c59200443072353044aa4bf737a5a60f9a9af231
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Nov 2 15:15:01 2006 +0100
+
+ Release U-Boot 1.1.6
+
+commit c1fbe4103a0d6c8957f912af902d705ba67836f2
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 19:14:48 2006 +0800
+
+ This patch comes from Yuli's posted patch on 8/8/2006
+ titled "CFI Driver Little-Endian write Issue".
+
+ http://sourceforge.net/mailarchive/message.php?msg_id=36311999
+
+ If that patch applied, please discard this one.
+ Until now , I do not see his patch is applied. So please apply this one.
+
+ Signed-off-by: Yuli Barcohen <yuli@arabellasw.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit b825f158e449e1e9cf74c08e572955e122394c96
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 19:12:31 2006 +0800
+
+ Tsi108 on chip i2c support.
+
+ The i2c Interface provides a master-only, serial interface that can be
+ used for initializing Tsi108/Tsi109 registers from an EEPROM after a
+ device reset.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 9226e7d6f09b9a1ac074cd918c81225a4689bba8
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 19:11:06 2006 +0800
+
+ Tsi108 on chip pci controller support.
+
+ If there is no pci card, the tsi108/109 pci configure read will
+ cause a machine check exception to the processor. PCI error should
+ also be cleared after the read.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit d1927cee977126e547ceeba23e4f978f377cfb8f
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 19:08:55 2006 +0800
+
+ Tundra tsi108 on chip Ethernet controller support.
+
+ The following is a brief description of the Ethernet controller:
+ The Tsi108/9 Ethernet Controller connects Switch Fabric to two independent
+ Gigabit Ethernet ports,E0 and E1. It uses a single Management interface
+ to manage the two physical connection devices (PHYs). Each Ethernet port
+ has its own statistics monitor that tracks and reports key interface
+ statistics. Each port supports a 256-entry hash table for address
+ filtering. In addition, each port is bridged to the Switch Fabric
+ through a 2-Kbyte transmit FIFO and a 4-Kbyte Receive FIFO.
+
+ Each Ethernet port also has a pair of internal Ethernet DMA channels to
+ support the transmit and receive data flows. The Ethernet DMA channels
+ use descriptors set up in memory, the memory map of the device, and
+ access via the Switch Fabric. The Ethernet Controller?s DMA arbiter
+ handles arbitration for the Switch Fabric. The Controller also
+ has a register businterface for register accesses and status monitor
+ control.
+
+ The PMD (Physical Media Device) interface operates in MII, GMII, or TBI
+ modes. The MII mode is used for connecting with 10 or 100 Mbit/s PMDs.
+ The GMII and TBI modes are used to connect with Gigabit PMDs. Internal
+ data flows to and from the Ethernet Controller through the Switch Fabric.
+
+ Each Ethernet port uses its transmit and receive DMA channels to manage
+ data flows through buffer descriptors that are predefined by the
+ system (the descriptors can exist anywhere in the system memory map).
+ These descriptors are data structures that point to buffers filled
+ with data ready to transmit over Ethernet, or they point to empty
+ buffers ready to receive data from Ethernet.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 78aa0c3427f3ecdeb34aabfbbe2dd23b6ad8f40e
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 19:01:33 2006 +0800
+
+ Tundra tsi108 header file.
+
+ The Tundra Semiconductor Corporation (Tundra) Tsi108 is a host bridge for
+ PowerPC processors that offers numerous system interconnect options for
+ embedded application designers. The Tsi108 can interconnect 60x or
+ MPX processors to PCI/X peripherals, DDR2-400 memory, Gigabit Ethernet,
+ and Flash. Provided the macro define for tsi108 chip.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 87c4db09699c6b89176b31004afcb83eb1585d47
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 18:59:15 2006 +0800
+
+ Add mpc7448hpc2 (mpc7448 + tsi108) board associated code support.
+ mpc7448hpc2 board support high level code:tsi108 init + mpc7448hpc2.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 27801b8ab11c61b577e45742a515bb3b23b80241
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 18:57:21 2006 +0800
+
+ Add mpc7448hpc2 (mpc7448 + tsi108) board associated code support.
+ Make ,config.mk and link file for the mpc7448hpc2 board.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit c6411c0c3bbc79f9ba8aef58296a42d8f9d8a0a6
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 18:55:04 2006 +0800
+
+ Add mpc7448hpc2 (mpc7448 + tsi108) board associated code support.
+ The mpc7448hpc2 board support header file.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 625bb5ddb50b243f931262ca8c46956409471917
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 18:52:21 2006 +0800
+
+ Add mpc7448hpc2 (mpc7448 + tsi108) board associated code support.
+ The mpc7448hpc2 board support low level assemble language init code.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 4c52783b3d024e153c4972b97332e314bc3bdc46
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 18:49:51 2006 +0800
+
+ General code modification for mpc7448hpc2 board support.
+ 1. Add 7447A and 7448 processor support.
+ 2. Add the following flags.
+
+ CFG_CONFIG_BUS_CLK : If the 74xx bus frequency can be configured dynamically
+ (such as by switch on board), this flag should be set.
+
+ CFG_EXCEPTION_AFTER_RELOCATE: If an exception occurs after the u-boot
+ relocates to RAM, this flag should be set.
+
+ CFG_SERIAL_HANG_IN_EXCEPTION: If the print out function will cause the
+ system hang in exception, this flag should be set.
+
+ There is a design issue for tsi108/109 pci configure read. When pci scan
+ the slots, if there is no pci card, the tsi108/9 will cause a machine
+ check exception for mpc7448 processor.
+
+ Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 69366bf42f22d67efce8da3f8c40a43d4a3c2695
+Author: roy zang <tie-fei.zang@freescale.com>
+Date: Thu Nov 2 18:34:47 2006 +0800
+
+ Add README file for mpc7448hpc2 board.
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 25721b5cec2be4bce79cfade17ec8f6aa1e67526
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Nov 1 02:04:38 2006 +0100
+
+ Finish up support for MarelV38B board
+ - add watchdog support
+ - enable GPIO_WKUP_7 pin for input
+ - code cleanup
+
+commit ffa150bc90c943ca265170bd1be3f293674dd5c7
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Nov 1 01:45:46 2006 +0100
+
+ - Fix issues related to the use of ELDK 4 when compiling for MarelV38B:
+ * remove warnings when compiling ethaddr.c
+ * adjust linker script (fixes a crash resulting from incorrect
+ definition of __u_boot_cmd_start)
+ - Some MarelV38B code cleanup.
+
+commit dae80f3caf9754a6dd3ddf3cf903d0c46cbd4385
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Nov 1 01:38:16 2006 +0100
+
+ - Add MPC5XXX register definition MPC5XXX_WU_GPIO_DATA_I and change the
+ MPC5XXX_WU_GPIO_DATA macro to MPC5XXX_WU_GPIO_DATA_O (per MPC5200 User's
+ Manual). Replace the uses of MPC5XXX_WU_GPIO_DATA with
+ MPC5XXX_WU_GPIO_DATA_O for affected boards.
+
+ - Add defintions for some MPC5XXX GPIO pins.
+
+commit 82d9c9ec29a1bec1b03ba616425ebaed231072c8
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Nov 1 01:34:29 2006 +0100
+
+ Changed MarelV38B board make target to lowercase. Config file cleanup.
+
+commit 1954be6e9c9421b45d0a9d05b10356acc7563150
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sun Oct 29 01:03:51 2006 +0200
+
+ Automatically adjust ARFLAGS so "make -s" is really silent.
+
+commit fae684e89844856383bdf101440889557df3e6b1
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 28 16:45:00 2006 +0200
+
+ [PATCH] omap925.c: Remove unused functions
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 1265581502ab8ea8c08e8edbe9bf64fbd62fd776
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 28 17:12:58 2006 +0200
+
+ [PATCH] Add some missing machtypes for netstar & voiceblue boards
+
+ Use MACH_TYPE_NETSTAR and MACH_TYPE_VOICEBLUE defines instead of
+ numbers in code.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 856f054410cef52d868feb330168b2a4c4091328
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 28 15:55:52 2006 +0200
+
+ [PATCH] NAND: Partition name support added to NAND subsystem
+
+ chpart, nboot and NAND subsystem related commands now accept also partition
+ name to specify offset.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 07a69a18c2ecfda904231fdf23e2523ea7792eb6
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sat Oct 28 02:29:44 2006 +0200
+
+ Update CHANGELOG.
+
+commit 2751a95abd1b96911081c357e96a12fa97b40dee
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sat Oct 28 02:29:14 2006 +0200
+
+ Enable commandline editing and hush shell on all TQM boards.
+
+commit 8078f1a5f63a739b8533478f6c2b62fb1e2f79d7
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sat Oct 28 02:28:02 2006 +0200
+
+ README says CFG_AUTO_COMPLETE, but ocde uses CONFIG_AUTO_COMPLETE
+
+commit 471a7be7a042e95e440f5de969c9765214ae8d6e
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Oct 28 01:14:32 2006 +0200
+
+ Check for illegal character '=' in environment variable names.
+
+ Make sure the string passed as variable name does not contain a '='
+ character. This not only prevents the common error or typing
+ "setenv foo=bar" instead of "setenv foo bar", but (more importantly)
+ also closes a backdoor which allowed to delete write-protected
+ environment variables, for example by using "setenv ethaddr=".
+
+commit 19973b6ad9863a56f5c5fbcfd90e20ab2490a2c2
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Sat Oct 28 00:38:39 2006 +0200
+
+ Minor code cleanup.
+
+commit e11887a77d81077416a2d1c5e0354916fee8c034
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Thu Oct 26 17:55:31 2006 +0200
+
+ Don't pass any debug options directly to the assembler
+
+ When passing the -g option to gcc, gcc automatically selects a
+ suitable --g<format> option to pass on to the assembler.
+ Thus, there's no point in forcing a specific debug option on the
+ assembler using the -Wa mechanism.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit ea08ff6e14f9ebb8c07cfa79c51ef540eb087393
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Fri Oct 27 07:47:22 2006 -0500
+
+ MPC86xx: Cleaned up unused and conditionally used local variables.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit d38936cdae46bfd2623ff83f6ce9b616d36ab0f9
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Fri Oct 27 11:55:21 2006 +0200
+
+ Fix "ar" flags in some Makefiles to allow for silent "make -s"
+
+commit 4653f91c13ed51c21cc4c3855745d69a3fb1817f
+Author: Ben Warren <bwarren@qstreams.com>
+Date: Thu Oct 26 14:38:25 2006 -0400
+
+ Fix TSEC driver (now for real): avoid crashes if PHY is not attached
+ to a TSEC (e.g. a switch is connected via RMII) or
+ if the PHY is defective/incorrectly configured.
+
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit b985b5d6e4fb88f508f7aa0f126c2e27ada2b999
+Author: Ben Warren <bwarren@qstreams.com>
+Date: Thu Oct 26 14:38:25 2006 -0400
+
+ Fix TSEC driver: avoid crashes if PHY is not attached
+ to a TSEC (e.g. a switch is connected via RMII) or
+ if the PHY is defective/incorrectly configured.
+
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit 2b2a40bebbf1822506e80e631d7253e60f0e0fe6
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Thu Oct 26 16:24:31 2006 +0200
+
+ Code cleanup.
+
+commit 5e3b0bc19f07ed277d85324ad0427642c8981baf
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed Oct 25 15:48:59 2006 +0200
+
+ Finish up support for the ATSTK1000/ATSTK1002 boards
+
+ Add atstk1002_config target to Makefile and move the AVR32 section
+ down below Blackfin so that it doesn't end up in the middle of
+ MIPS.
+
+ Drop the autogenerated linker script thing for now. Will have to
+ revisit how to handle chips with different flash and RAM layout
+ later.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit c76f951a747cfb87ba826ef45b5aea82d5b5dbb4
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Oct 24 23:47:37 2006 -0500
+
+ Added support for Multi-Image files that contain a device tree
+
+ If a Multi-Image file contains a third image we try to use it as a
+ device tree. The device tree image is assumed to be uncompressed in the
+ image file. We automatically allocate space for the device tree in memory
+ and provide an 8k pad to allow more than a reasonable amount of growth.
+
+ Additionally, a device tree that was contained in flash will now automatically
+ get copied to system memory as part of boot. Previously an error was
+ reported if one tried to boot a device tree that was in flash.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7c52c4b943ff52bbe8796a7e2d3e476ceaf3f512
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Oct 24 21:35:55 2006 +0200
+
+ Switch to automatically generated CHANGELOG file.
+ (use "make CHANGELOG" to update it from time to time)
+
commit 7ade0c634a979c32fa91a74e8f5775f24651fbe6
Author: Stefan Roese <sr@denx.de>
-Date: Tue Oct 24 18:06:48 2006 +0200
+Date: Tue Oct 24 18:06:48 2006 +0200
Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.c
Patch by Stefan Roese, 24 Oct 2006
commit 8ae3b713b2286e0c3213b7802062e4c1599010de
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 17:24:55 2006 +0200
+Date: Tue Oct 24 17:24:55 2006 +0200
Merge with /home/wd/git/u-boot/master
commit 47a6989c10685d2ab3efcf95228ce50d2a496d3e
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 15:32:57 2006 +0200
+Date: Tue Oct 24 15:32:57 2006 +0200
Code cleanup
commit 3a78e3e75b633ecb6413114ffd11e2f000c4f11e
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 14:51:36 2006 +0200
+Date: Tue Oct 24 14:51:36 2006 +0200
Move atstk1000 files into vendor specific directory.
Patch by Haavard Skinnemoen, 12 Sep 2006
commit 6ccec4492e77428fd6eafd3dfe94fbdf08e91d37
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 14:42:37 2006 +0200
+Date: Tue Oct 24 14:42:37 2006 +0200
Add ATSTK1000 and ATSTK1002 board support
Patch by Haavard Skinnemoen, 06 Sep 2006
-
+
This patch adds support for the ATSTK1000 with the ATSTK1002 CPU
daughterboard.
-
+
ATSTK1000 is a full-featured development board for AT32AP CPUs. It
has two ethernet ports, a high quality QVGA LCD panel, a loudspeaker,
and connectors for USART, PS/2, VGA, USB, MMC/SD cards and
CompactFlash cards. For more information, please see this page:
-
+
http://www.atmel.com/dyn/products/tools.asp?family_id=682
-
+
The ATSTK1002 is a daughterboard for the ATSTK1000 supporting the
AT32AP7000 chip.
-
+
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
commit f93ae788c3640fcde5db383471d45548ff4060d0
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 14:31:24 2006 +0200
+Date: Tue Oct 24 14:31:24 2006 +0200
Add common serial driver for Atmel AT32 and AT91 chips
Patch by Haavard Skinnemoen, 06 Sep 2006
-
+
This is a first attempt at creating a common serial driver for Atmel
chips. For now, it supports the AT32AP7000 AVR32 chip, but it should
be possible to support AT91RM9200 and other ARM-based chips with some
minor modifications.
-
+
There's nothing fundamentally AVR32-specific in this driver, but it
does use some features which are currently only defined for the
AT32AP CPU port:
* pm_get_clock_freq: Obtain the clock frequency of a given domain
* gd->console_uart: A "struct device" containing information about
- register mappings, gpio resources and clocks associated with the
- UART device.
-
+ register mappings, gpio resources and clocks associated with the
+ UART device.
+
For more information about these features, please see the "AT32AP
CPU" patch.
commit 72a087e04705c26cad982879ebd06b5281bf825a
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 14:27:35 2006 +0200
+Date: Tue Oct 24 14:27:35 2006 +0200
Add AT32AP CPU and AT32AP7000 SoC support
Patch by Haavard Skinnemoen, 06 Sep 2006
-
+
This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.
-
+
The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":
-
+
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
-
+
In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:
-
+
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
-
+
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
commit 7b64fef33c66be648826c0ff9758298ef13d0604
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 14:21:16 2006 +0200
+Date: Tue Oct 24 14:21:16 2006 +0200
Add AVR32 architecture support
Patch by Haavard Skinnemoen, 6 Sep 2006 16:23:02 +0200
-
+
This patch adds common infrastructure code for the Atmel AVR32
architecture. See doc/README.AVR32 for details.
-
+
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
commit 2da2d9a4766063b9848f3a35ad6025499cf87265
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 13:57:33 2006 +0200
+Date: Tue Oct 24 13:57:33 2006 +0200
Use -g instead of -gstabs in AFLAGS_DEBUG
Patch by Haavard Skinnemoen, 30 Aug 2006
-
+
In config.mk, -Wa,-gstabs is unconditionally appended to AFLAGS no
matter what the target's preferred debugging format is. This patch
simply replaces -gstabs with -g, so that the default debugging format
commit 965829872169c2996023840d98e1d85ad148d629
Author: Wolfgang Denk <wd@pollux.denx.de>
-Date: Tue Oct 24 13:55:18 2006 +0200
+Date: Tue Oct 24 13:55:18 2006 +0200
Fix/workaround broken dependency handling with make 3.81
Based on patch by Haavard Skinnemoen, 29 Aug 2006 11:20:39 +0200
commit 8318fbf8cc30418b621ea9f39b84b4c1a08f003a
Author: Marian Balakowicz <m8@semihalf.com>
-Date: Mon Oct 23 22:17:05 2006 +0200
+Date: Mon Oct 23 22:17:05 2006 +0200
Fix sequoia separate object direcory building problems.
commit 3dfa9cfdcee78b30da3432318b32821ffabe974b
Author: Jon Loeliger <jdl@freescale.com>
-Date: Fri Oct 20 17:16:35 2006 -0500
+Date: Fri Oct 20 17:16:35 2006 -0500
Use generic I2C register block on 85xx and 86xx.
-
+
Replace private IMMAP I2C structures with generic reg block
and allow 86xx to have multiple I2C device busses.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit f5012827df11ca0c9be1df5f8b153e188dc2fa7c
Author: Jon Loeliger <jdl@freescale.com>
-Date: Fri Oct 20 15:54:34 2006 -0500
+Date: Fri Oct 20 15:54:34 2006 -0500
Fix compilation warnings on a few 85xx boards.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 2047672684cf85cb6f96a1fbc993180aaaf19a99
Author: Jon Loeliger <jdl@freescale.com>
-Date: Fri Oct 20 15:50:15 2006 -0500
+Date: Fri Oct 20 15:50:15 2006 -0500
Converted all 85xx boards to use a common FSL I2C driver.
Introduced COFIG_FSL_I2C to select the common FSL I2C driver.
And removed hard i2c path from a few u-boot.lds scipts too.
Minor whitespace cleanups along the way.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 4d45f69e362b05892c9e92a7907e5820995612aa
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Oct 19 12:02:24 2006 -0500
+Date: Thu Oct 19 12:02:24 2006 -0500
Rewrite a series of goto statements as a sequences of
conditional expressions instead.
-
+
Use consistent return code 0/-1 for good/bad indicators.
-
+
Include one fewer file if the driver isn't used at all.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 7237c033b02fe295880435f1eb80819a0c987532
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Oct 19 11:02:16 2006 -0500
+Date: Thu Oct 19 11:02:16 2006 -0500
Moved i2c driver out of cpu/mpc86xx/i2c.c into drivers/fsl_i2c.c
-
+
in an effort to begin to unify the umpteen FSL I2C drivers that
are all otherwise very similar.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 13a7fcdf37f6ea9429ae04c9df67f893364cfe4b
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Oct 19 11:33:52 2006 -0500
+Date: Thu Oct 19 11:33:52 2006 -0500
* Fix a bunch of compiler warnings for gcc 4.0
-
+
Signed-off-by: Matthew McClintock <msm@freescale.com>
+commit af9e1f5b9e6f9ce810f5e8bf2961c9542a5865c2
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Oct 17 06:14:31 2006 +0200
+
+ Add monitor functions for indirect access to PPC440 DCR's
+ Patch by Leonid Baryudin, 12 Oct 2006
+
commit 5f3249a0a168e446a4cc9669b2bce0bc456f0a09
Author: Jon Loeliger <jdl@freescale.com>
-Date: Fri Oct 13 16:47:53 2006 -0500
+Date: Fri Oct 13 16:47:53 2006 -0500
Fixed leading whitespace issues.
Removed spurious LAWAR thing.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 0ee90cb77e01d6e8ccd37e1bd96678597875c391
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Oct 12 10:42:36 2006 -0500
+Date: Thu Oct 12 10:42:36 2006 -0500
Remove unneeded include files and local variable.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 1eaf3a5ff4960a46f3a9063568ba2af7883f07c5
Author: Grant Likely <grant.likely@secretlab.ca>
-Date: Tue Oct 10 00:23:32 2006 -0600
+Date: Tue Oct 10 00:23:32 2006 -0600
Fix possible uninitialized variable compiler warning.
-
+
When CONFIG_OF_FLAG_TREE is set, the compiler complains that 'len' in
do_bootm_linux() may be uninitialized. There is no possibility in the
current code that len will get used uninitialized, but this fix follows
the existing convention of setting both len and data to zero at the same
time.
-
+
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
commit 7376eb87aaa601f728f9b8e5e9cd2711a67f529e
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Oct 11 15:13:01 2006 -0500
+Date: Wed Oct 11 15:13:01 2006 -0500
* Fix a bunch of compiler warnings for gcc 4.0
-
+
Signed-off-by: Matthew McClintock <msm@freescale.com>
commit bf651baa365e5447246aad6a633ccd667cf24a39
Author: Jon Loeliger <jdl@freescale.com>
-Date: Wed Oct 11 10:10:43 2006 -0500
+Date: Wed Oct 11 10:10:43 2006 -0500
Move "ar" flags to config.mk to allow for silent "make -s"
commit 1fd5699a4a24f5c1dab1b32f480bace1ebb9fc3e
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Oct 10 17:19:03 2006 -0500
+Date: Tue Oct 10 17:19:03 2006 -0500
Coding style changes to remove local varible blocks
and reformat a bit nicer.
commit 8b283dbb3a08d1b8d406bc15f119e081b3e2606a
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Oct 10 17:16:04 2006 -0500
+Date: Tue Oct 10 17:16:04 2006 -0500
Fix whitespace issues.
commit 7b382b7125f2397cce63253df62f183e3dfa2770
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Oct 10 17:14:45 2006 -0500
+Date: Tue Oct 10 17:14:45 2006 -0500
Fix whitespace issues.
commit e10390ddd736b0dad1528eec4b0fe35c0827139a
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Oct 10 17:06:53 2006 -0500
+Date: Tue Oct 10 17:06:53 2006 -0500
Fix whitespace issues.
commit 89875e96ba3f023157bf50d5f8e33bf254964a76
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Oct 10 17:03:43 2006 -0500
+Date: Tue Oct 10 17:03:43 2006 -0500
Ran lindent and cleaned up whitespace issues.
Format for 80-columns too.
commit 333961ae7095fc66d8a041fce1ac9ee873b09d86
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Oct 10 17:02:22 2006 -0500
+Date: Tue Oct 10 17:02:22 2006 -0500
Fix whitespace and 80-col issues.
+commit 5c912cb1c31266c66ca59b36f9b6f87296421d75
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 7 11:36:51 2006 +0200
+
+ CFG_NAND_QUIET_TEST added to not warn upon missing NAND device
+ Patch by Stefan Roese, 07 Oct 2006
+
+commit 5bc528fa4da751d472397b308137238a6465afd2
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 7 11:35:25 2006 +0200
+
+ Update ALPR code (NAND support working now)
+ Patch by Stefan Roese, 07 Oct 2006
+
+commit 77d5034847d328753b80c46b83f960a14a26f40e
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 7 11:33:03 2006 +0200
+
+ Remove compile warnings in fpga code
+ Patch by Stefan Roese, 07 Oct 2006
+
+commit f3443867e90d2979a7dd1c65b0d537777e1f9850
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Oct 7 11:30:52 2006 +0200
+
+ Add CONFIG_BOARD_RESET to configure board specific reset function
+ Patch by Stefan Roese, 07 Oct 2006
+
commit f55df18187e7a45cb73fec4370d12135e6691ae1
Author: John Traill <john.traill@freescale.com>
-Date: Fri Sep 29 08:23:12 2006 +0100
+Date: Fri Sep 29 08:23:12 2006 +0100
Fix missing tCycle/modfreq calculation.
-
+
Signed-off-by: John Traill <john.traill@freescale.com>
commit 8272dc2f58f2473d8995fcc9b916440cfba080f0
Author: Andy Fleming <afleming@freescale.com>
-Date: Wed Sep 13 10:33:35 2006 -0500
+Date: Wed Sep 13 10:33:35 2006 -0500
Updated config headers to add default FDT-based booting
commit 09f3e09e9ebcfa7919ca8931a4b5504fadd1f1d3
Author: Andy Fleming <afleming@freescale.com>
-Date: Wed Sep 13 10:34:18 2006 -0500
+Date: Wed Sep 13 10:34:18 2006 -0500
Add support for eTSEC 3 & 4 on 8548 CDS
-
+
* Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS.
This will only work on rev 1.3 boards (but doesn't break older boards)
* Cleaned up some comments to reflect the expanded role of tsec
commit 084d648b109c8984f83674043c1a7fa3885ef801
Author: Andy Fleming <afleming@freescale.com>
-Date: Wed Sep 13 10:33:56 2006 -0500
+Date: Wed Sep 13 10:33:56 2006 -0500
Added code to support 2.6.18 PCI changes in u-boot
-
+
* Added code to swizzle the IRQ map for the PCI
commit afbdc649f8751e4f4f1a6f527edfe139773f2c15
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Sep 19 09:34:10 2006 -0500
+Date: Tue Sep 19 09:34:10 2006 -0500
Modified makefile for new build mechanism.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit d14ba6a798beb753e7a864500414fcc2d198b8bc
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Sep 14 08:40:36 2006 -0500
+Date: Thu Sep 14 08:40:36 2006 -0500
Handle 86xx SVR values according to the new Reference Manual.
Both 8641 and 8641D have SVR == 0x8090, and are distinguished
by the byte in bits 16-23 instead.
Thanks to Jason Jin for noticing.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 88c8f4921fc47fb0eb2384b16586f1bd7f275be7
Author: Zhang Wei <wei.zhang@freescale.com>
-Date: Mon Aug 28 14:25:31 2006 +0800
+Date: Mon Aug 28 14:25:31 2006 +0800
Fixed an OF-tree off-by-one bug when adding a new property name.
This bug will cause the kernel booting to pause a long time.
-
+
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
(cherry picked from 2f15776ccc6dc32377d8ba9652b8f58059c27c6d commit)
commit 9bff7a69a885adebbd2bd45990494ec4cf998a30
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 29 11:05:09 2006 -0500
+Date: Tue Aug 29 11:05:09 2006 -0500
Remove trailing empty lines.
commit cd6d73d5b895a5935ac4fde0a356288142a584e0
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 29 09:48:49 2006 -0500
+Date: Tue Aug 29 09:48:49 2006 -0500
Remove bogus msync and use volatile asm.
commit 778d45049ce5927b65b3ff1d8e6692b654bdd49e
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 29 08:17:14 2006 -0500
+Date: Tue Aug 29 08:17:14 2006 -0500
Add myself as maintainer for MPC8641HPCN.
commit 2f15776ccc6dc32377d8ba9652b8f58059c27c6d
Author: Zhang Wei <wei.zhang@freescale.com>
-Date: Mon Aug 28 14:25:31 2006 +0800
+Date: Mon Aug 28 14:25:31 2006 +0800
Fixed an OF-tree off-by-one bug when adding a new property name.
This bug will cause the kernel booting to pause a long time.
-
+
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
commit 5567806b67d0ae83493aa8823ad3b6c914f581d7
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Fri Aug 25 14:38:34 2006 -0400
+Date: Fri Aug 25 14:38:34 2006 -0400
Change ramdiskaddr and dtbaddr
Remove PEX fluff commands.
-
+
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit b2b78421d9db49c21a821af8a19c21c1f7dfb29e
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Aug 23 13:32:45 2006 -0500
+Date: Wed Aug 23 13:32:45 2006 -0500
* Another small fix for booting with disable_of
-
+
Signed-off-by: Matthew McClintock <msm@freescale.com>
commit 4a7cc0f21918e6ecf07ed57075d67df2c4a1299c
Author: Jon Loeliger <jdl@freescale.com>
-Date: Wed Aug 23 11:04:43 2006 -0500
+Date: Wed Aug 23 11:04:43 2006 -0500
Cleanup and lindent new AHCI driver.
commit dabf9ef8c10b4dead5ef2106ef742b1c06b542de
Author: Jin Zhengxiong <jason@bus.ap.freescale.net>
-Date: Wed Aug 23 19:15:12 2006 +0800
+Date: Wed Aug 23 19:15:12 2006 +0800
Add AHCI define and sata support for MPC8641HPCN board.
-
+
Signed-off-by:Jason Jin<jason.jin@freescale.com>
commit 4782ac80b02f0d01afd309e2200dd3c7037f2ba4
Author: Jin Zhengxiong <jason@bus.ap.freescale.net>
-Date: Wed Aug 23 19:10:44 2006 +0800
+Date: Wed Aug 23 19:10:44 2006 +0800
Add AHCI support to u-boot
-
+
Add AHCI support in u-boot, enable the sata disk controllers which
following the AHCI protocol.
-
+
Signed-off-by:Jason Jin<jason.jin@freescale.com>
commit d8ea2acf5f137cae99417df4f573d036ee384668
Author: Zhang Wei <wei.zhang@freescale.com>
-Date: Wed Aug 23 17:54:32 2006 +0800
+Date: Wed Aug 23 17:54:32 2006 +0800
Add dtb boot-up parameter to default boot commands.
-
+
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
commit b93775c2036b99baa390ea425c4771895bbc63c4
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 22 18:26:08 2006 -0500
+Date: Tue Aug 22 18:26:08 2006 -0500
Cleanup even more poorly introduced whitespace.
commit ae6241685cbcf0c79a3636530d2ceab1fb291a94
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 22 18:07:00 2006 -0500
+Date: Tue Aug 22 18:07:00 2006 -0500
Cleanup more poorly introduced whitespace.
commit 2c33e8a1c535b3ae91cf0b284480600bf3f57c57
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 22 17:54:05 2006 -0500
+Date: Tue Aug 22 17:54:05 2006 -0500
Cleanup poorly introduced whitespace.
commit 80e955c7dd98f4b4fd23c2113caf75ed2b77b5b3
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 22 12:25:27 2006 -0500
+Date: Tue Aug 22 12:25:27 2006 -0500
General indent and whitespace cleanups.
commit ffff3ae56f5842ca3679e4ce7922b819a87aad9f
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 22 12:06:18 2006 -0500
+Date: Tue Aug 22 12:06:18 2006 -0500
General indent and whitespace cleanups.
commit 41a0e8b304d3ff55fe27a230507aac79684016ac
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue Aug 22 10:42:21 2006 -0500
+Date: Tue Aug 22 10:42:21 2006 -0500
Cleanup compiler warnings.
commit 5de62c47a8628b3da4d73f7c07027f32a3342d40
Author: Matthew McClintock <msm@freescale.com>
-Date: Tue Aug 22 09:31:59 2006 -0500
+Date: Tue Aug 22 09:31:59 2006 -0500
Fix disable_of booting
-
+
Signed-off-by: Matthew McClintock <msm@freescale.com>
commit 87a449c8ac396420cb24260f717ea9e6faa82047
Author: Matthew McClintock <msm@freescale.com>
-Date: Tue Aug 22 09:23:55 2006 -0500
+Date: Tue Aug 22 09:23:55 2006 -0500
Support for FDT in uImage format, error when using FDT from flash
-
+
Signed-off-by: Matthew McClintock <msm@freescale.com>
commit 75c299c38369d01addd5e054b8a16217b70f4a86
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Tue Aug 15 15:12:55 2006 -0400
+Date: Tue Aug 15 15:12:55 2006 -0400
Unlock cache before kernel starts up for MPC86xx
commit 67256678f00c09b0a7f19e862e5c1847553d31bc
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Tue Aug 15 15:13:15 2006 -0400
+Date: Tue Aug 15 15:13:15 2006 -0400
Copy Global Data Pointer to r29 for DECLARE_GLOBAL_DATA_PTR
commit 1c8f6d8fb028f156094d05f2d14298e6479364ac
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Tue Aug 15 15:12:55 2006 -0400
+Date: Tue Aug 15 15:12:55 2006 -0400
Unlock cache before kernel starts up for MPC86xx
commit 0d9ccc55edf9a7f3c5b2b6263580a6ea8d702a04
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Tue Aug 15 15:13:15 2006 -0400
+Date: Tue Aug 15 15:13:15 2006 -0400
Copy Global Data Pointer to r29 for DECLARE_GLOBAL_DATA_PTR
commit 86c8e17f25e972a7e272950a0735fad84e082b88
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Aug 16 13:59:47 2006 -0500
+Date: Wed Aug 16 13:59:47 2006 -0500
* Fix disable_of booting
-
+
Signed-off-by: Matthew McClintock <msm@freescale.com>
commit 25c751e9adc86e22fe3b5b47cf2806379b575db7
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Aug 16 10:54:09 2006 -0500
+Date: Wed Aug 16 10:54:09 2006 -0500
* Support for FDT in uImage format, error when using FDT from flash
-
+
Signed-off-by: Matthew McClintock <msm@freescale.com>
+commit 899620c2d66d4eef3b2a0034d062e71d45d886c9
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 15 14:22:35 2006 +0200
+
+ Add initial support for the ALPR board from Prodrive
+ NAND needs some additional testing
+ Patch by Heiko Schocher, 15 Aug 2006
+
+commit f0ff4692ff3372dec55074a8eb444943ab095abb
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 15 14:15:51 2006 +0200
+
+ Add FPGA Altera Cyclone 2 support
+ Patch by Heiko Schocher, 15 Aug 2006
+
commit fecf1c7e4de1b2779edc18742b91c22bdc32b68b
Author: Jon Loeliger <jdl@freescale.com>
-Date: Mon Aug 14 15:33:38 2006 -0500
+Date: Mon Aug 14 15:33:38 2006 -0500
Fix BAT0 to actually be cacheable, non-guarded as documented.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 40bc83559db5745681909fd7382ae509567e116d
Author: Jon Loeliger <jdl@freescale.com>
-Date: Wed Aug 9 15:32:16 2006 -0500
+Date: Wed Aug 9 15:32:16 2006 -0500
Removed MPC8641HPCN DTS source file from build.
It is no longer linked into U-Boot; its sources are
now located in the kernel tree.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 34c3c0e01dbf1f8cc2bd08de92f2b89ba84921eb
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:47:03 2006 -0500
+Date: Wed Jun 28 10:47:03 2006 -0500
* Switched default PCI speed for 8540 ADS back to 33MHz
-
+
* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit b6c5e1373b6ea0bb37a18e4aeecec00613d1cd39
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:46:35 2006 -0500
+Date: Wed Jun 28 10:46:35 2006 -0500
* Fixed a bug where 8555 PCI code used the old variable and function names Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit bf1dfffd8c26f8ecdd630a0ae4c834e751e4e452
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:46:13 2006 -0500
+Date: Wed Jun 28 10:46:13 2006 -0500
* Added VIA configuration table
-
+
* Added support for PCI2 on CDS
Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit c88f9fe66b64247e5b6a38410ba315ca25596d16
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:45:41 2006 -0500
+Date: Wed Jun 28 10:45:41 2006 -0500
* Fixed PCI memory definitions Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit 97074ed9655309b64231bc2cee69fe85399f8055
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:45:17 2006 -0500
+Date: Wed Jun 28 10:45:17 2006 -0500
* Added support for initializing second PCI bus on 85xx Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit f0e6f57f71b3c4fdd13028eb03c3f3e91926dda2
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:44:49 2006 -0500
+Date: Wed Jun 28 10:44:49 2006 -0500
* Added PCI-X #defines for PCI-X initialization Patch by Andy Fleming on 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit a4e11558b810ef2cddffdf7b9d86bc1130441960
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:44:23 2006 -0500
+Date: Wed Jun 28 10:44:23 2006 -0500
* Made sure the code which disables prefetch for PCI devices sets the size of the prefetch region to 0 Patch by Andy Fleming on 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit 0e16387db1d4aacd5bf35cb6d7c1942765c0347b
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:43:36 2006 -0500
+Date: Wed Jun 28 10:43:36 2006 -0500
* Add Flat Dev Tree construction for MPC85xx ADS and CDS boards Patch by Jon Loeliger 17-Jan-2006
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 855e6fb073f9d04fe4a7f06c107ecbac6344ddd4
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:43:00 2006 -0500
+Date: Wed Jun 28 10:43:00 2006 -0500
* Removed the oftree.dts for stxxtx in light of the changes to the flat device tree handling code Patch by Matthew McClintock 26-June-2006
commit 5498d90312aad9f6bdbf047986027c35b03cd163
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:42:24 2006 -0500
+Date: Wed Jun 28 10:42:24 2006 -0500
* Patch to modify ft_build.c to update flat device trees in place Patch by Matthew McClintock 26-June-2006
commit 0267768eddc5ca7bc1865bc40c866829ac5efbfe
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:41:37 2006 -0500
+Date: Wed Jun 28 10:41:37 2006 -0500
* Modify bootm command to support booting with flat device trees Patch by Matthew McClintock 26-June-2006
commit 8fc8bd2cc479b6cd188fdede4010e0e052970b8a
Author: John Traill <john.traill@freescale.com>
-Date: Wed Aug 9 14:33:50 2006 +0100
+Date: Wed Aug 9 14:33:50 2006 +0100
Add Rapidio support for the MPC8641HPCN
-
+
Signed-off-by: John Traill <john.traill@freescale.com>
commit 91a414c7d1fb0eac912592cd995b30c9f23045c9
Author: John Traill <john.traill@freescale.com>
-Date: Tue Aug 8 11:32:43 2006 +0100
+Date: Tue Aug 8 11:32:43 2006 +0100
Fix caslat calculation
-
+
Signed-off-by: John Traill <john.traill@freescale.com>
commit 709d3073e74153278e7904a70819bbef7df50e1a
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Aug 3 16:17:56 2006 -0500
+Date: Thu Aug 3 16:17:56 2006 -0500
Convert to mac-address in ethernet nodes.
commit 71748af833ca1017edf1415be376366ff2937d17
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Fri Jul 28 12:41:35 2006 -0400
+Date: Fri Jul 28 12:41:35 2006 -0400
Correct the irq value of DUART2
commit 9cb3e8816ae4d854e7dc22128c3eea3d70bb982c
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Fri Jul 28 12:41:41 2006 -0400
+Date: Fri Jul 28 12:41:41 2006 -0400
Change the space size of PEX IO in README
commit 239db37c94f7a92941c4465feceb867c609241c5
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Fri Jul 28 12:41:18 2006 -0400
+Date: Fri Jul 28 12:41:18 2006 -0400
Move get_board_sys_clk to board directory
commit 492900b985439fbce1a118afde1e35def870db03
Author: John Traill <john.traill@freescale.com>
-Date: Fri Jul 28 09:03:54 2006 +0100
+Date: Fri Jul 28 09:03:54 2006 +0100
Fix 8641HPCN pollution
commit 515ab8a62e8574e2babc6e8dcc43544ad221c5b2
Author: John Traill <john.traill@freescale.com>
-Date: Fri Jul 28 08:16:06 2006 +0100
+Date: Fri Jul 28 08:16:06 2006 +0100
Fix 8641HPCN timebase
commit c86360b830f1eecd7a72208575dde4f57879faea
Author: Zhang Wei <wei.zhang@freescale.com>
-Date: Fri Jul 28 00:01:34 2006 +0800
+Date: Fri Jul 28 00:01:34 2006 +0800
Fixed OF device tree of mpc86xxhpcn board.
-
+
The changes works in with kernel irq mapping rework.
-
+
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
commit bea3f28d285942bf3f7ab339ce85178ded544225
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Wed Jul 12 10:48:05 2006 -0400
+Date: Wed Jul 12 10:48:05 2006 -0400
Add support for reading and writing mac addresses to or from ID EEPROM.
-
+
Added code for reading and writing Mac addresses to/from ID EEPROM(0x57).
With attached patch, we can use command "mac/mac read/mac save/"
to read and write EEPROM under u-boot prompt.
-
+
U-boot will calculate the checksum of EEPROM while bootup,
if it is right, then u-boot will check whether the mac address
of eTSEC0/1/2/3 is availalbe (non-zero).
-
+
If there is mac address availabe in EEPROM, u-boot will use it,
otherewise, u-boot will use the mac address defined in
MPC8641HPCN.h. This matches the requirement to set unique mac address
for each TSEC port.
-
+
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
commit fcb28e763415e0e4e66b0f45842d1557ae198e5e
Author: Jin Zhengxiong <Jason.Jin@freescale.com>
-Date: Thu Jul 13 10:35:10 2006 -0500
+Date: Thu Jul 13 10:35:10 2006 -0500
Fixed initrd issue by define big RAM
-
+
Signed-off-by:Jason Jin <Jason.jin@freescale.com>
commit e6cd2a1785d74ec3d30a86f1cb360be8de478151
Author: Jason Jin <Jason.jin@freescale.com>
-Date: Fri Jul 7 10:01:45 2006 -0500
+Date: Fri Jul 7 10:01:45 2006 -0500
We made a u-boot patch to fix the hang up issue
when booting filesystem from ramdisk.
-
+
Signed-off-by:Jason Jin <Jason.jin@freescale.com>
commit 38433ccc5850ee70549af0b2bc5b920355ef5388
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:47:03 2006 -0500
+Date: Wed Jun 28 10:47:03 2006 -0500
* Switched default PCI speed for 8540 ADS back to 33MHz
* Added comments and a printf to warn that PCI-X won't
work at 33MHz
Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit e4c2a0eb0c3e3ffbf824800184ee42bdc99d5b19
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:46:35 2006 -0500
+Date: Wed Jun 28 10:46:35 2006 -0500
* Fixed a bug where 8555 PCI code used the old variable and
function names
Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit cbfc7ce756b88eb26e5537bc7b625c445c6dcfac
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:46:13 2006 -0500
+Date: Wed Jun 28 10:46:13 2006 -0500
* Added VIA configuration table
* Added support for PCI2 on CDS
Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit 52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:45:41 2006 -0500
+Date: Wed Jun 28 10:45:41 2006 -0500
* Fixed PCI memory definitions
Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit 087454609e47295443af793a282cddcd91a5f49c
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:45:17 2006 -0500
+Date: Wed Jun 28 10:45:17 2006 -0500
* Added support for initializing second PCI bus on 85xx
Patch by Andy Fleming 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit b636aaeb6fd516a442fb611bbeeddf3077a687fb
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:44:49 2006 -0500
+Date: Wed Jun 28 10:44:49 2006 -0500
* Added PCI-X #defines for PCI-X initialization
Patch by Andy Fleming on 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit 20abbc6fffa115690107cc942c7abf84bdc03a1b
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:44:23 2006 -0500
+Date: Wed Jun 28 10:44:23 2006 -0500
* Made sure the code which disables prefetch for PCI devices
sets the size of the prefetch region to 0
Patch by Andy Fleming on 17-Mar-2006
-
+
Signed-off-by: Andy Fleming <afleming@freescale.com>
commit 40d5fa35d02df22580593bf0039ab173367e8ef0
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:43:36 2006 -0500
+Date: Wed Jun 28 10:43:36 2006 -0500
* Add Flat Dev Tree construction for MPC85xx ADS and CDS boards
Patch by Jon Loeliger 17-Jan-2006
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit be7e8b0cb5a0c49dc180075b96df296a893bf146
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:43:00 2006 -0500
+Date: Wed Jun 28 10:43:00 2006 -0500
* Removed the oftree.dts for stxxtx in light of the changes
to the flat device tree handling code
commit 1b380ec225665e73959677f3893dc658c5925e05
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:42:24 2006 -0500
+Date: Wed Jun 28 10:42:24 2006 -0500
* Patch to modify ft_build.c to update flat device trees in place
Patch by Matthew McClintock 26-June-2006
commit 98a9c4d468a942a09ebe8979bec508017f3e4462
Author: Matthew McClintock <msm@freescale.com>
-Date: Wed Jun 28 10:41:37 2006 -0500
+Date: Wed Jun 28 10:41:37 2006 -0500
* Modify bootm command to support booting with flat device trees
Patch by Matthew McClintock 26-June-2006
commit da012ab661fd4ab169dd7b9b32201a4df62cf34a
Author: Jin Zhengxiong <Jason.Jin@freescale.com>
-Date: Wed Jun 28 08:43:56 2006 -0500
+Date: Wed Jun 28 08:43:56 2006 -0500
Change Id to symbolic name for RTL8139
-
+
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
commit bc09cf3c2bfb8d54c659cbb332f79d0950982fd0
Author: Jin Zhengxiong-R64188 <Jason.Jin@freescale.com>
-Date: Tue Jun 27 18:12:10 2006 +0800
+Date: Tue Jun 27 18:12:10 2006 +0800
Fix RTL8139 in big endian
-
+
signed-off-by: Jason Jin <Jason.Jin@freescale.com>
signed-off-by: Wei Zhang <wei.zhang@freescale.com>
commit fcfb9a57947fc203b99fe81ab0578f7286261f9f
Author: Jin Zhengxiong-R64188 <Jason.Jin@freescale.com>
-Date: Tue Jun 27 18:12:23 2006 +0800
+Date: Tue Jun 27 18:12:23 2006 +0800
Fix Tsec bug when no link
-
+
When tftp a non-exist file from the tftp server, u-boot will check
the link of all eth port. The original file will return wrong link
state on the no link ports.
-
+
signed-off-by: Jason Jin <Jason.Jin@freescale.com>
commit bd22c2b97514fbfb0e03bd9c72b3445e4dbd57e2
Author: Jin Zhengxiong-R64188 <Jason.Jin@freescale.com>
-Date: Tue Jun 27 18:12:02 2006 +0800
+Date: Tue Jun 27 18:12:02 2006 +0800
Fix bug for io_bar size during pci scan
-
+
During the pci scan process, Some devices return bar_reponse with the
highest bytes 0, such as the pci bridge in uli1575 return bar_response
with 0xffffff, So the bar_size should be manually set under 64K.
-
+
Signed-off-by: Jason Jin <jason.jin@freescale.com>
commit fa7db9c377bc2353a17bf1d381d65a6c418728f0
Author: Jin Zhengxiong-R64188 <Jason.Jin@freescale.com>
-Date: Tue Jun 27 18:11:54 2006 +0800
+Date: Tue Jun 27 18:11:54 2006 +0800
Enable PCIE1 for MPC8641HPCN board
-
+
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
commit 684623ce92c5fd32e7db2d6e016945a67c5ffaba
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Jun 22 08:51:46 2006 -0500
+Date: Thu Jun 22 08:51:46 2006 -0500
Fix bug in 8641hpcn reset command with no args.
-
+
Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
commit 8be429a5ddbf0ebe2d94174ba58fcfc7a24285dc
Author: Zhang Wei <wei.zhang@freescale.com>
-Date: Tue Jun 20 17:47:15 2006 +0800
+Date: Tue Jun 20 17:47:15 2006 +0800
Reworked IRQ mapping in OF-tree.
commit 0e4c2a17ca34001ed36d259f13cb88ada4611a8c
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Jun 15 21:33:37 2006 -0500
+Date: Thu Jun 15 21:33:37 2006 -0500
Do not enable address translation on secondary CPUs.
Do not set up BATs on secondary CPUs. Let Linux do the nasty.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 8ecc971618f56029ad99d3516f8b297a6ed58971
Author: Jon Loeliger <jdl@jdl.com>
-Date: Wed Jun 7 10:53:55 2006 -0500
+Date: Wed Jun 7 10:53:55 2006 -0500
Fix a get_board_sys_clk() use-before-def warning.
-
+
Signed-off-by: Jon Loeliger <jdl@jdl.com>
commit d9bf4858fca5aa4d651b283270f77da72ebadfd5
Author: Jon Loeliger <jdl@jdl.com>
-Date: Wed Jun 7 10:52:49 2006 -0500
+Date: Wed Jun 7 10:52:49 2006 -0500
Allow DTC path to be passed in.
-
+
Signed-off-by: Jon Loeliger <jdl@jdl.com>
commit c83ae9ea6d93abbe751bf8a3396236a084e56f87
Author: Haiying Wang <haiying.wang@freescale.com>
-Date: Tue Jun 6 16:54:29 2006 -0400
+Date: Tue Jun 6 16:54:29 2006 -0400
Modify the IRQ of DUART2
commit c934f655f9aeca70a5c5f88b465d9e9d57a8d22e
Author: Jon Loeliger <jdl@jdl.com>
-Date: Wed May 31 13:55:35 2006 -0500
+Date: Wed May 31 13:55:35 2006 -0500
Review cleanups.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit cb5965fb95b77a49f4e6af95248e0c849f4af03e
Author: Jon Loeliger <jdl@jdl.com>
-Date: Wed May 31 12:44:44 2006 -0500
+Date: Wed May 31 12:44:44 2006 -0500
White space cleanup.
Some 80-column cleanups.
Convert printf() to puts() where possible.
Use #include "spd_sdram.h" as needed.
Enhanced reset command usage message a bit.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 3d5c5be547445dd3bd2eb7368d80df03ea437970
Author: Jon Loeliger <jdl@jdl.com>
-Date: Wed May 31 11:39:34 2006 -0500
+Date: Wed May 31 11:39:34 2006 -0500
Removed unneeded local_bus_init() from 8641HPCN board.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 4d3d729c16c392d2982d3266b659d333c927697d
Author: Jon Loeliger <jdl@jdl.com>
-Date: Wed May 31 11:24:28 2006 -0500
+Date: Wed May 31 11:24:28 2006 -0500
Moved mpc8641hpcn_board_reset() out of cpu/ into board/.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit b2a941de060350ad15878d8219825f4950e9bb8e
Author: Jon Loeliger <jdl@jdl.com>
-Date: Wed May 31 10:07:28 2006 -0500
+Date: Wed May 31 10:07:28 2006 -0500
Remove dead debug code.
-
+
Signed-off-by: Jon Loeliger <jdl@jdl.com>
commit 126aa70f10ba3d20e0a6f4d32328250513b77770
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue May 30 17:47:00 2006 -0500
+Date: Tue May 30 17:47:00 2006 -0500
Move mpc86xx PIXIS code to board directory
-
+
First cut at moving the PIXIS platform code out of
the 86xx cpu directory and into board/mpc8641hpcn
where it belongs.
-
+
Signed-off-by: Jon Loeliger <jdl@freescale.com>
commit 38cee12dcfcc257371c901c7e13e58ecab0a35d8
Author: Haiying Wang <Haiying.Wang@freescale.com>
-Date: Tue May 30 09:10:32 2006 -0500
+Date: Tue May 30 09:10:32 2006 -0500
Improve "reset" command's interaction with watchdog.
-
- "reset altbank" will reset another bank WITHOUT watch dog timer enabled
- "reset altbank wd" will reset another bank WITH watch dog enabled
- "diswd" will disable watch dog after u-boot boots up successfully
-
+
+ "reset altbank" will reset another bank WITHOUT watch dog timer enabled
+ "reset altbank wd" will reset another bank WITH watch dog enabled
+ "diswd" will disable watch dog after u-boot boots up successfully
+
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
commit 70205e5a6ddc8528b11db9eb4d3fa0209d9fce2a
Author: Haiying Wang <Haiying.Wang@freescale.com>
-Date: Tue May 30 08:51:19 2006 -0500
+Date: Tue May 30 08:51:19 2006 -0500
Fix two SDRAM setup bugs.
-
- Fix ECC setup bug.
- Enable 1T/2T based on number of DIMMs present.
-
+
+ Fix ECC setup bug.
+ Enable 1T/2T based on number of DIMMs present.
+
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
commit d11fec5015334deb2010e36ce00bb118cc5429a5
Author: Haiying Wang <Haiying.Wang@freescale.com>
-Date: Fri May 26 10:24:48 2006 -0500
+Date: Fri May 26 10:24:48 2006 -0500
Add first draft of the MPC8641HPCN doc/README.
-
+
Signed-off-by: Jon Loeliger <jdl@jdl.com>
commit ed45d6c930b5939718a87ee12e25cf9a05978d4a
Author: Haiying Wang <Haiying.Wang@freescale.com>
-Date: Fri May 26 10:13:04 2006 -0500
+Date: Fri May 26 10:13:04 2006 -0500
Added pci@8000 block.
Updated ethernet interrupt mappings (moved up 48).
Cleaned up a few comments.
-
+
Signed-off-by: Jon Loeliger <jdl@jdl.com>
commit 3033ebb20fd7c372c7bca3c9955a4692bb2240b7
Author: Haiying Wang <Haiying.Wang@freescale.com>
-Date: Fri May 26 10:01:16 2006 -0500
+Date: Fri May 26 10:01:16 2006 -0500
Allow args on reset command.
-
+
Signed-off-by: Jon Loeliger <jdl@jdl.com>
commit 14e37081ff3cac7ebe6e93836523429853b6b292
Author: Jon Loeliger <jdl@jdl.com>
-Date: Fri May 19 13:28:39 2006 -0500
+Date: Fri May 19 13:28:39 2006 -0500
Change arbitration to round-robin for SMP linux.
commit 9a655876e5995be80f49054e2509500e871e4d3a
Author: Jon Loeliger <jdl@jdl.com>
-Date: Fri May 19 13:26:34 2006 -0500
+Date: Fri May 19 13:26:34 2006 -0500
Enable dual DDR controllers and interleaving.
commit 586d1d5abd3e525f1e1d9b81e5a61a4da6b2fa3c
Author: Jon Loeliger <jdl@jdl.com>
-Date: Fri May 19 13:22:44 2006 -0500
+Date: Fri May 19 13:22:44 2006 -0500
Update 86xx address map and LAWBARs.
commit cccce5d0581bb0ba4602799a4b5112e58d1579cb
Author: Jon Loeliger <jdl@jdl.com>
-Date: Fri May 19 13:14:15 2006 -0500
+Date: Fri May 19 13:14:15 2006 -0500
Remove L2 Cache invalidate polling.
commit f35ec68fb066cec0e36294bfe07dec2d4e8ad3a8
Author: Jon Loeliger <jdl@jdl.com>
-Date: Fri May 19 12:33:09 2006 -0500
+Date: Fri May 19 12:33:09 2006 -0500
Enable 2nd CPU and I2C.
commit bf690dcb512d34c4fceec0eb1e5c0e88a9db5d54
Author: Jon Loeliger <jdl@freescale.com>
-Date: Mon May 15 07:26:56 2006 -0500
+Date: Mon May 15 07:26:56 2006 -0500
Update interrupt mapping.
commit 6cfea33477b04b63ed47386ed1629529484c33ba
Author: Haiying Wang <Haiying.Wang@freescale.com>
-Date: Wed May 10 09:38:06 2006 -0500
+Date: Wed May 10 09:38:06 2006 -0500
Remove unneeded INIT_RAM_LOCK cache twiddling.
Correctly tracks r29 as global data pointer now.
-
+
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
commit d4dd317b58c126a2a7e73f4764ecc1a7c97f876c
Author: Jon Loeliger <jdl@freescale.com>
-Date: Wed May 10 09:33:07 2006 -0500
+Date: Wed May 10 09:33:07 2006 -0500
Remove unnecessary flash.c file.
commit 18b6c8cd8af6cc7f35180cedc4adb3236cc1a1b8
Author: Jon Loeliger <jdl@freescale.com>
-Date: Tue May 9 08:23:49 2006 -0500
+Date: Tue May 9 08:23:49 2006 -0500
Get MPC8641HPCN flash images working.
-
- Enable the CFI driver.
- Remove bogus LAWBAR7 cruft.
- Use correct TEXT_BASE, Fixup load script.
- Enable SPD EEPROM during DDR setup.
- Use generic RFC 1918 IP addresses by default.
+
+ Enable the CFI driver.
+ Remove bogus LAWBAR7 cruft.
+ Use correct TEXT_BASE, Fixup load script.
+ Enable SPD EEPROM during DDR setup.
+ Use generic RFC 1918 IP addresses by default.
commit 5c9efb36a6b5431423f52888a0e3b4b515fe7eca
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Apr 27 10:15:16 2006 -0500
+Date: Thu Apr 27 10:15:16 2006 -0500
Cleanup whitespaces and style issues.
Removed //-style comments.
commit a2320a6bf8113a09544c42d160d10ac69d049a03
Author: Jon Loeliger <jdl@freescale.com>
-Date: Thu Apr 27 08:22:39 2006 -0500
+Date: Thu Apr 27 08:22:39 2006 -0500
Revert bad PCI prefetch limit change.
commit debb7354d1ea4f694154818df5e5b523f5c1cc1d
Author: Jon Loeliger <jdl@freescale.com>
-Date: Wed Apr 26 17:58:56 2006 -0500
+Date: Wed Apr 26 17:58:56 2006 -0500
Initial support for MPC8641 HPCN board.