+commit 9e78dae2b276c5bf9ab92cd85173f6cb92b1b7d5
+Author: Vivek Kutal <vivek.kutal@azingo.com>
+Date: Mon Feb 23 21:35:11 2009 +0530
+
+ Replaced endpoint numbers with appropriate macros in usbtty.c.
+
+ Signed-off-by: Vivek Kutal <vivek.kutal@azingo.com>
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit a43ea5cc6d612471fbc74f0a26b2bea5864aa1d6
+Author: Jon Smirl <jonsmirl@gmail.com>
+Date: Thu Mar 19 23:04:18 2009 -0400
+
+ .gitignore for generated files in api_examples directory
+
+ Add .gitignore for generated files in api_examples directory
+
+ Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 40281a9ca21a6b6d7b996b4d4eeaa19026337231
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Wed Mar 18 12:27:04 2009 +0900
+
+ net: sh_eth: Remove sh_eth_reset() from halt function
+
+ sh_eth_reset is function to reset Ether IP.
+ The MAC address is stored in IP, but it is initialized by this function.
+ OS (e.g. Linux Kernel) can not use this device when initialized.
+ This revises this problem.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+
+commit f8853d105da7d69bc92a5b4578f9b85234e558ec
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Fri Mar 20 12:45:50 2009 +0100
+
+ ppc4xx: Fix bug in PCI outbound map configuration for canyonlands
+
+ PCI outbound address map configuration doesn't match the
+ PCI memory address range covered by appropriate TLB entry
+ configuration for canyonlands causing machine check
+ exceptions while accessing PCI memory regions. This patch
+ provides a fix for this issue.
+
+ Kazuaki Ichinohe observed and reported this issue while
+ testing display output with PCI ATI video card on canyonlands.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7a88601a34132548c3c591ea87ab3468b51121b0
+Author: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+Date: Fri Mar 6 10:09:37 2009 -0500
+
+ CFI: geometry reversal for STMicro M29W320DT
+
+ Follow up to the flash_fixup_stm to fix geometry reversal
+ on STMicro M29W320ET flash chip. The M29W320DT has 4 erase region.
+
+ Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 069f4364d807d7fdea3de7385ad2f8d83c587aec
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Wed Feb 25 17:29:40 2009 -0500
+
+ smc911x_eeprom: update register API
+
+ The smc911x driver changed the naming convention for its register funcs,
+ so update the eeprom code accordingly.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ CC: Ben Warren <biggerbadderben@gmail.com>
+
+commit 6a397ef0e6c58caab8bf427d447714bc9b3bb9d4
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Tue Mar 17 10:06:39 2009 +0100
+
+ mpc52xx: Get rid of board-specific #ifdef's in cpu/mpc5xxx/ide.c
+
+ Total5200 and digsy MTC use I2C port 2 pins as a ATA chip select.
+ To avoid adding board-specific ifdefs to cpu/mpc5xxx/ide.c new
+ define CONFIG_SYS_ATA_CS_ON_I2C2 was introduced. It is used by
+ Total5200 and will be used by digsy MTC and other boards with
+ ATA CS on I2C pins.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 1b6275dfb173bd2edb8f208dd050d6f47ae39654
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Mar 12 07:37:34 2009 +0100
+
+ 8xx: add support for new keymile kmsupx4 board.
+
+ This patch adds support for the kmsupx4 board from Keymile,
+ based on a Freescale MPC852T CPU
+
+ - serial console on SMC1
+ - 32 MB SDRAM
+ - 32 MB NOR Flash
+ - Ethernet over SCC3
+ - I2C Bitbang
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit d044954fe2a7e7a3dd104eb9c9d2104e38da2911
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Mar 12 07:37:28 2009 +0100
+
+ 8xx, mgsuvd: rename board to a more generic name
+
+ renaming the "mgsuvd" board port into "km8xx", because
+ there come more similar boards from keymile.
+ Compiling the mgsuvd board with "make mgsuvd_config"
+ remains.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 18b2f35bde1672e074a3d5048383cb56fda745cb
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Mar 12 07:37:23 2009 +0100
+
+ 8xx, mgsuvd: Coding Style cleanup config file
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 364123db6730d32330f818b65360d2cd27396667
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Mar 12 07:37:18 2009 +0100
+
+ powerpc: common updates for keymile boards
+
+ - added to keymile-common.h:
+ - bootcount support
+ - COMMAND HISTORY
+ - CONFIG_AUTO_COMPLETE
+ - CONFIG_SYS_FLASH_PROTECTION
+ - JFFS2 support
+ - CONFIG_VERSION_VARIABLE
+ - extracted common I2C settings for all boards
+ - common default environment settings summarized
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 506f391888b82d1b83bdd749c3cea9eb2fd64df8
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Mar 12 07:37:15 2009 +0100
+
+ 8xx, icache: enabling ICache not before running from RAM
+
+ with the new CONFIG_SYS_DELAYED_ICACHE config option, ICache
+ is not enabled before code runs from RAM.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit cabf7b9c83bd780a5805ddbb4c0ce431d5b9f9f3
+Author: Heiko Schocher <hs@denx.de>
+Date: Thu Mar 12 07:37:11 2009 +0100
+
+ 82xx, mgcoge: fix environment sector size
+
+ Size of one environment sector is 0x20000.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 27057d416c7cc9eb1860953da8836352c07f13e9
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Mon Mar 16 23:27:31 2009 +0100
+
+ NetStar: config reindentation
+
+ Fix indentation broken by symbol renames. "Sort" driver related definitons.
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+
+commit 8d8235f84d3ef3f29b7d14e741369b5824b5bb4a
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Mar 17 11:21:43 2009 +0000
+
+ ColdFire: Fix incorrect definition
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 9017d9325a5067b2ab0d70a2d3c907620c9ab7f8
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Mon Mar 2 19:16:45 2009 +0000
+
+ ColdFire: Fix M5329EVB and M5373EVB nand issue
+
+ The Nand flash was unable to read and write properly
+ due to Nand Chip Select (nCE) setup was in reverse
+ order. Also, increase the Nand time out value to 60.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 42b68af1062f75bb4a91cf47e329a7e8100cd815
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Jan 27 15:19:35 2009 +0000
+
+ ColdFire: PLATFORM_CPPFLAGS updates for new compiler
+
+ Update PLATFORM_CPPFLAGS to accept 4.3.x version of
+ ColdFire compiler.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit d6e4baf49987fc6f75e8574c0c27301a828b3132
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Jan 27 12:57:47 2009 +0000
+
+ ColdFire: Provide gzip image size V2 & V3 platforms
+
+ Default gzip bootm size is 8MB. Some platforms require
+ more than 8MB
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit c3a9e6374210679a81f611c1bcf968988bc20e41
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Feb 18 11:49:31 2009 +0000
+
+ ColdFire: Fix M54451 serial boot dram setup
+
+ The serial boot dram extended/standard mode register was not
+ setup and was using default DRAM setup causing the U-boot was
+ unstable to boot up in serial mode.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 32d11d58159a575f08a982cad8a5a941ffe5cc3d
+Author: arun c <arun.edarath@gmail.com>
+Date: Thu Dec 4 15:57:15 2008 +0530
+
+ Coldfire: XL Bus minor fixes
+
+ According to coldfire manual data timeout > address time out
+ also use correct macro to program XARB_CFG
+
+ Signed-off-by: Arun C <arunedarath@mistralsolutions.com>
+
+commit 65d8bc94d8214812ccdf3372d3fef845cf4ec2e5
+Author: Scott Wood <scottwood@freescale.com>
+Date: Tue Mar 17 12:06:04 2009 -0500
+
+ NAND: Have nboot accept .e and .i as legacy no-ops.
+
+ This was intended to happen before, but a trivial bug prevented it.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 0987505540918b2464b73069af3a5b766dbd3ceb
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Fri Mar 13 14:38:19 2009 +0100
+
+ NAND: Make nboot skip bad blocks
+
+ nboot command currently does not skip bad blocks and gives read error when
+ loading image stored over bad block. With patch applied, nboot works as
+ expected:
+
+ Device 0 bad blocks:
+ 00780000
+ 014a0000
+ 02000000
+ 02cc0000
+ 04aa0000
+
+ Loading from NAND 128MiB 3,3V 8-bit, offset 0x2c00000
+ Image Name: Linux-2.6.22-omap1
+ Created: 2008-11-20 23:44:32 UTC
+ Image Type: ARM Linux Kernel Image (uncompressed)
+ Data Size: 1052520 Bytes = 1 MB
+ Load Address: 10008000
+ Entry Point: 10008000
+ Skipping bad block 0x02cc0000
+ Automatic boot of image at addr 0x10400000 ...
+ ...
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 0b2f38fe3c4555dd2b81c69880403c13ad723153
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 12 07:27:25 2009 +0100
+
+ ppc4xx: lwmon5: Only use one CS (rank) in DDR2 configuration
+
+ This patch fixes a problem spotted by Mikhail Zolotaryov on Sequoia with
+ the DDR2 configuration to only use one CS (rank). As this code is most
+ likely copied from the original Sequoia version, this error was copied
+ as well.
+
+ This patch also removes some dead code.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9199b9cc8f56aca26504b48cf702176208f46e54
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Mar 12 07:24:40 2009 +0100
+
+ ppc4xx: PMC440: Only use one CS (rank) in DDR2 configuration
+
+ This patch fixes a problem spotted by Mikhail Zolotaryov on Sequoia with
+ the DDR2 configuration to only use one CS (rank). As this code is most
+ likely copied from the original Sequoia version, this error was copied
+ as well.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ee86fd15e1ccda4be41f1dba82b8c9efea9a3145
+Author: Mikhail Zolotaryov <lebon@lebon.org.ua>
+Date: Wed Mar 11 10:54:46 2009 +0200
+
+ Fix AMCC Sequoia board DDR memory configuration
+
+ Sequoia board schematics (DES0211_11_SCH_11.pdf, page 5, unit U1D)
+ specifies that BankSel#1 is not connected, while bootloader memory
+ configuration is (board/amcc/sequoia/sdram.c):
+ mtsdram(DDR0_10, 0x00000300);
+ i.e. both Chip Selects used - not correct.
+
+ If we change to correct value here:
+ mtsdram(DDR0_10, 0x00000100);
+ memory is accessible OK also.
+
+ Signed-off-by: Mikhail Zolotaryov <lebon@lebon.org.ua>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b3dd629e78870ba2dc9f8032978721c0fa02a856
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Mar 15 22:40:09 2009 +0100
+
+ Prepare 2009.03-rc2
+
+ Update CHANEGLOG, fix minor coding style issue.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 394d30dd1ee23b80fd5e59e17ebe0feca927ab31
+Author: Jerry Van Baren <gvb.uboot@gmail.com>
+Date: Fri Mar 13 11:40:10 2009 -0400
+
+ mpc83xx: Add bank configuration to FSL spd_sdram.c
+
+ The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8
+ bank SDRAMs.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+ Acked-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit b581626c1e2474a3dadf69d4f0e0582eccbc4235
+Author: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
+Date: Fri Mar 13 08:58:14 2009 +0100
+
+ mpc83xx: correctly set encryption and I2C bus 0 clock
+
+ This patch makes sure the correct mask is applied when setting
+ the encryption and I2C bus 0 clock in SCCR.
+ Failing to do so may lead to ENCCM being 0 in which case I2C bus 0
+ won't function.
+
+ Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit e6a6a704151c2d7e4a7b485545b48a6020ccca17
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Thu Mar 12 19:30:50 2009 +0100
+
+ OMAP3: Add support for OMAP3 die ID
+
+ Read and store OMAP3 die ID in U-Boot environment.
+
+ Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
+
+commit f949bd8d089ec3059c460ac829c0d919e1d7af0e
+Author: Jon Smirl <jonsmirl@gmail.com>
+Date: Wed Mar 11 15:08:56 2009 -0400
+
+ MPC5200 FEC MII speed register
+
+ Set a non-zero speed in the MII register so that MII commands will work.
+
+ Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
+
+commit 94a353611b93ac4cb4434a5f7e98aa0902da919e
+Author: Yusuke.Goda <goda.yusuke@renesas.com>
+Date: Fri Mar 13 16:08:18 2009 +0900
+
+ sh: ap325rxa: Change the wait cycle in the area 5
+
+ Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 2db0e1278b9f11263e0a13326b57d4f99781f7ac
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Wed Feb 25 16:04:26 2009 +0900
+
+ sh: Fix cannot work rtl8139 on r2dplus
+
+ The rtl8139 driver use pci_mem_to_phys. So it need PCI system memory
+ registration.
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 64f3c0b8ba99d6651db59273e497ab5e857c8d4f
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Fri Feb 27 18:35:41 2009 +0900
+
+ sh: Add netdev header fixing of warning/build
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit ada9318252f51c2626e9837c623f9812b0308dea
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Tue Mar 3 15:11:17 2009 +0900
+
+ sh: Add support 32-Bit Extended Address Mode to sh7785lcr
+
+ We can built 'make sh7785lcr_32bit_config'. And add new command "pmb"
+ for this mode. This command changes PMB for using 512MB system memory.
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 06b18163b57e6b0349b0c299222d50e7b1e41e50
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Wed Feb 25 14:26:42 2009 +0900
+
+ sh: Add some register value configurable to PCI of SH7780
+
+ Some register value was hardcoded for System memory size 128MB and
+ memory offset 0x08000000. This patch fixed the problem.
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 06e2735eb85cbea7cecb3c308d6d078b3651b22c
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Wed Feb 25 14:26:52 2009 +0900
+
+ sh: Add system memory registration to PCI for SH4
+
+ It is necessary for some pci device driver.
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit b3061b40db691245a7bb9a55354b4edacbf3902d
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Wed Feb 25 14:26:55 2009 +0900
+
+ sh: Add value for PCI system memory registration of sh7785lcr
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 6d84ae3956a6cd7aebd86f661130752594e60124
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Tue Mar 3 15:11:08 2009 +0900
+
+ sh: Add macros for SH-4A 32-Bit Address Extended Mode
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 3e3eec39de8fe0ae62e6e4d4e3fa4442ee9ed6b1
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Tue Feb 3 13:35:05 2009 +0900
+
+ sh: use write{8,16,32} in ms7720se lowlevel_init
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 0452352df118bc9dd684a056aaaa5fb4aed1178a
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Mon Mar 9 18:07:53 2009 -0500
+
+ tsec: report when there is no vendor specific PHY support
+
+ Commit af1c2b84 added a generic phy support, with an ID of zero
+ and a 32 bit mask; meaning that it will match on any PHY ID.
+
+ The problem is that there is a test that checked if a matching
+ PHY was found, and if not, it printed the non-matching ID.
+ But since there will always be a match (on the generic PHY,
+ worst case), this test will never trip.
+
+ In the case of a misconfigured PHY address, or of a PHY that
+ isn't explicitly supported outside of the generic support,
+ you will never see the ID of 0xffffffff, or the ID of the
+ real (but unsupported) chip. It will silently fall through
+ onto the generic support.
+
+ This change makes that test useful again, and ensures that
+ the selection of generic PHY support doesn't happen without
+ some sort of notice. It also makes it explicitly clear that
+ the generic PHY must be last in the PHY table.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit c279dfc10186ceba78d3862036f158750e86599a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Mar 9 10:53:05 2009 +0100
+
+ SIMPC8313 board: fix out of tree building.
+
+ Fix typo in makefile which broke out of tree builds.
+
+ Also use expolicit "rm" instead of "ln -sf" which is known to be
+ unreliable.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 49b5aff491bd574935ecaf8545152066a25eff3d
+Author: ksi@koi8.net <ksi@koi8.net>
+Date: Mon Feb 23 10:53:13 2009 -0800
+
+ Add eTSEC 1/2 IO override control (corrected)
+
+ This adds tsec12ioovcr to include/asm-ppc/immap_85xx.h (was reserved.)
+
+ Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
+
+commit 48c2b7bb432da84fcce05b4db6efad0be73a93dc
+Author: Andy Fleming <afleming@freescale.com>
+Date: Fri Mar 6 19:05:52 2009 -0600
+
+ fsl: Remove unnecessary debug printfs
+
+ These were left in accidentally, and are not really useful unless the
+ code is as broken as it was when it was being developed.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 0ee84b88b78bce425190d8cd7adf4c30cba0c2f0
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue Feb 24 02:37:59 2009 -0600
+
+ Fix mpc85xx ddr-gen3 ddr_sdram_cfg.
+
+ Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
+ sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit a922fdb87af25c25c032424908dcf60fbf3250ea
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Tue Feb 24 06:13:10 2009 +0100
+
+ PXA: timer use do_div and simplify it
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 4b00d1aa82b6af9b4e628a5729a12086e44558b3
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Mar 9 10:51:39 2009 +0100
+
+ SIMPC8313 board: fix out of tree building.
+
+ Fix typo in makefile which broke out of tree builds.
+
+ Also use expolicit "rm" instead of "ln -sf" which is known to be
+ unreliable.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f70fd13e2fe4cf58e251271c27f9c06e141d7f9a
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 24 11:30:51 2009 +0100
+
+ 8360, kmeter1: added bootcount feature.
+
+ add CONFIG_BOOTCOUNT_LIMIT feature for 8360 CPU.
+
+ The bootcounter uses 8 bytes from the muram,
+ because no other memory was found on this
+ CPU for the bootcount feature. So we must
+ correct the muram size in DTS before booting
+ Linux.
+
+ This feature is actual only implemented for
+ MPC8360, because not all 83xx CPU have qe,
+ and therefore no muram, which this feature
+ uses.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 1e7ed2565031e01abc18c713030a0a9829c07684
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 24 11:30:48 2009 +0100
+
+ 83xx, kmeter: QE_ENET10 errata for Silicon Revision 2.1
+
+ old code implemented the QE_ENET10 errata only for Silicon
+ Revision 2.0. New code reads now the Silicon Revision
+ register and sets dependend on the Silicon Revision the
+ values as advised in the QE_ENET10 errata.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 605f78e34a3f0103693b891f2573edd352e7d495
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 24 11:30:44 2009 +0100
+
+ 83xx, kmeter1: updates for 2009.03
+
+ - HRCW update
+ HRCWH_BOOTSEQ_DISABLE not HRCWH_BOOTSEQ_NORMAL
+ HRCWH_LALE_EARLY added
+ - DDR-SDRAM settings modified. This solves sporadically
+ problems with this memory.
+ - CS1 now 128 MB window size
+ - CS3 now 512 MB window size
+ - PRAM activated
+ - MTDPARTS_DEFAULT defined
+ - CONFIG_HOSTNAME added
+ - MONITOR_LEN now 384 KB
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 118cbe3c35c898f8d020b29d6dc180307cacf147
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 24 11:30:40 2009 +0100
+
+ 83xx, kmeter1: autodetect size of DDR II RAM
+
+ it is possible that some board variants have different DDR II
+ RAM sizes. So we autodetect the size of the assembled RAM.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit c1bce4fff750d734b1fa7467eb08f93902c97ca6
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 24 11:30:37 2009 +0100
+
+ 83xx, i2c: add mux support for fsl_i2c
+
+ This patch adds I2C mux support for the fsl_i2c driver. This
+ allows you to add "new" i2c busses, which are reached over
+ i2c muxes. For more infos, please look in the README and
+ search for CONFIG_I2C_MUX.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 19f0e93041dbfe22f8d39b98e4f7f9ea87b77803
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 24 11:30:34 2009 +0100
+
+ 83xx, kmeter1: add I2C, dtt, eeprom support
+
+ This patch adds I2C support for the Keymile kmeter1 board.
+ It uses the First I2C Controller from the CPU, for
+ accessing 4 temperature sensors, an eeprom with IVM data
+ and the booteeprom over a pca9547 mux.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit db1d72afd77287bc8577210f3f71ab249dcf146f
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 24 11:30:30 2009 +0100
+
+ i2c, dtt: move dtt_init () to board_init_r ()
+
+ In case where a board not uses CONFIG_POST, it is not
+ necessary to init the DTTs when running from flash.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 5b0055547f0246908b79cc300170d87380b69e18
+Author: Dave Liu <daveliu@freescale.com>
+Date: Wed Feb 25 12:31:32 2009 +0800
+
+ 83xx: Fix some bugs in spd sdram code
+
+ 1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
+ tRTP according to DDR2 JEDEC spec.
+ 2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
+ 3. add the support of DDR2-533,667,800 DIMMs
+ 4. cpo
+ 5. make the AL to min to gain better performance.
+
+ The Micron MT9HTF6472CHY-667D1 DIMMs test passed on
+ MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate.
+
+ items 1, 2 and 5:
+ Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+
+ Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit b7be63abec45858c044f0fbd6aeef524c4663f9b
+Author: Valeriy Glushkov <gvv@lstec.com>
+Date: Wed Feb 4 18:27:49 2009 +0200
+
+ MPC8349ITX: several config issues fixed
+
+ The previous version rebooted forever with DDR bigger than 256MB.
+ Access the DS1339 RTC chip is on I2C1 bus.
+ Allow DHCP.
+
+ Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 7e2ec1de1d2d723b59d7dd2fb85ff71b952d63af
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Feb 19 18:20:39 2009 +0300
+
+ mpc83xx: MPC837XEMDS: Initialize SerDes before negating PCIE reset signal
+
+ The SerDes initialization should be finished before negating the reset
+ signal according to the reference manual. This isn't an issue on real
+ hardware, but we'd better stick to the specifications anyway.
+
+ Suggested-by: Liu Dave <DaveLiu@freescale.com>
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 9c2d63ec0e9520948b6d598ea32e9aa4e0de847f
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Feb 25 12:28:32 2009 +0100
+
+ i2c, dtt: move dtt_init () to board_init_r ()
+
+ it is not necessary to init the DTTs so early,
+ so move this init to board_init_r ().
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 00cc5595a7caac8066b408774383a956c2e26797
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Wed Feb 25 20:28:13 2009 +0100
+
+ lcd: Fix compilation warning in common/lcd.c
+
+ Fix following warning while compilation for mcc200 board:
+
+ lcd.c: In function 'lcd_display_bitmap':
+ lcd.c:625: warning: unused variable 'cmap'
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit f5a77a09c93fe7f04c0c56f64ea436f7d318d674
+Author: Graeme Russ <graeme.russ@gmail.com>
+Date: Tue Feb 24 21:11:24 2009 +1100
+
+ Moved SC520 Files (fix commit 407976185e0dda2c90e89027121a1071b9c77bfb)
+
+ Fixes commit 407976185e0dda2c90e89027121a1071b9c77bfb
+
+ Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
+
+commit 75ba6d693b8f6247aa4b81323a2ee2fa28222215
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Feb 23 10:29:47 2009 -0500
+
+ smc911x: split out useful defines/functions into local header
+
+ The smc911x driver has a lot of useful defines/functions which can be used
+ by pieces of code (such as example eeprom programmers). Rather than
+ forcing each place to duplicate these defines/functions, split them out
+ of the smdc911x driver into a local header.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Acked-by: Ben Warren <biggerbadderben@gmail.com>
+ CC: Sascha Hauer <s.hauer@pengutronix.de>
+ CC: Guennadi Liakhovetski <lg@denx.de>
+ CC: Magnus Lilja <lilja.magnus@gmail.com>
+ CC: Ben Warren <biggerbadderben@gmail.com>
+
+commit a2bb7105a79af8f2ffa9f87256fce6c1cbcbd8e1
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Tue Feb 24 10:44:02 2009 +0100
+
+ ARM: add an "eet" variant of the imx31_phycore board
+
+ The "eet" variant of the imx31_phycore board has an OLED display, using a
+ s6e63d6 display controller on the first SPI interface, using GPIO57 as a
+ chip-select for it. With this configuration you can display 256 colour BMP
+ images in 16-bit RGB (RGB565) LCD mode.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0c99f6ab31c5635874ba7a2e8d37791bfbf02f8f
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Fri Feb 6 10:37:57 2009 +0100
+
+ video: add an i.MX31 framebuffer driver
+
+ Add a driver for the Synchronous Display Controller and the Display
+ Interface on i.MX31, using IPU for DMA channel setup. So far only
+ displaying of bitmaps is supported, no text output.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Acked-by: Anatolij Gustschin <agust@denx.de>
+
+commit b245e65ee3c4cce3ccf008a21f4528239655876c
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Fri Feb 6 10:37:53 2009 +0100
+
+ LCD: support 8bpp BMPs on 16bpp displays
+
+ This patch also simplifies some ifdefs in lcd.c, introduces a generic
+ vidinfo_t, which new drivers are encouraged to use and old drivers to switch
+ over to.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Acked-by: Anatolij Gustschin <agust@denx.de>
+
+commit a303dfb0e9a93e516ea9427b5c09543d5f74ade1
+Author: Mark Jackson <mpfj@mimc.co.uk>
+Date: Fri Feb 6 10:37:49 2009 +0100
+
+ Add 16bpp BMP support
+
+ This patch adds 16bpp BMP support to the common lcd code.
+
+ Use CONFIG_BMP_16BPP and set LCD_BPP to LCD_COLOR16 to enable the code.
+
+ At the moment it's only been tested on the MIMC200 AVR32 board, but extending
+ this to other platforms should be a simple task !!
+
+ Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Acked-by: Anatolij Gustschin <agust@denx.de>
+
+commit 689551c5ff1b394b88412f3df22144e79468d3a9
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Fri Feb 6 10:37:41 2009 +0100
+
+ A driver for the S6E63D6 SPI display controller from Samsung
+
+ This is a driver for the S6E63D6 SPI OLED display controller from Samsung.
+ It only provides access to controller's registers so the client can freely
+ configure it.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Acked-by: Anatolij Gustschin <agust@denx.de>
+
+commit fc7a93c84f3f134484811a0d9ad751fbc1a7da6d
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Fri Feb 13 09:26:40 2009 +0100
+
+ i.MX31: support GPIO as a chip-select in the mxc_spi driver
+
+ Some SPI devices have special requirements on chip-select handling.
+ With this patch we can use a GPIO as a chip-select and strictly follow
+ the SPI_XFER_BEGIN and SPI_XFER_END flags.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit b30de3cccf8867566cd314e7c7033904afa5dc9d
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sat Feb 7 01:18:07 2009 +0100
+
+ i.MX31: add a simple gpio driver
+
+ This is a minimal driver, so far only managing output. It will
+ be used by the mxc_spi.c driver.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f
+Author: Guennadi Liakhovetski <lg@denx.de>
+Date: Sat Feb 7 00:09:12 2009 +0100
+
+ i.MX31: fix SPI driver for shorter than 32 bit
+
+ Fix setting the SPI Control register, 8 and 16-bit transfers
+ and a wrong pointer in the free routine in the mxc_spi driver.
+
+ Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
+ Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 7e91558032a0c1932dd7f4f562f9c7cc55efc496
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Feb 19 18:20:52 2009 +0300
+
+ mpc83xx: MPC837XERDB: Add PCIe support
+
+ On MPC8377E-RDB and MPC8378E-RDB boards we have PCIe and mini-PCIe
+ slots. Let's support them.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 50a4d08e8f31debbd4ea12caf1265f3643c38d5b
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Feb 19 18:20:50 2009 +0300
+
+ mpc83xx: PCI: Fix hard-coded first_busno value
+
+ We should use pci_last_busno() in pci_init_bus(), otherwise we'll
+ erroneously re-use PCI0's first_busno for PCI1 hoses.
+
+ NOTE: The patch is untested. All MPC83xx FSL boards I have have
+ PCI1 in miniPCI form, for which I don't have any cards handy.
+
+ But looking in cpu/mpc85xx/pci.c:
+ ...
+ #ifdef CONFIG_MPC85XX_PCI2
+ hose = &pci_hose[1];
+
+ hose->first_busno = pci_hose[0].last_busno + 1;
+
+ And considering that we do the same for MPC83xx PCI-E support,
+ I think this patch is correct.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit a5878d427128c1a9226045ebe05fbadaa02eb9dd
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Feb 19 18:20:46 2009 +0300
+
+ mpc83xx: PCI: Fix bus-range fdt fixups for PCI1 controllers
+
+ This patch fixes copy-paste issue: pci_hose[0]'s first and last
+ busnos were used to fixup pci1's nodes.
+
+ We don't see this bug triggering only because Linux reenumerate
+ buses anyway.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit b24a99f6666ac278ec9f9c1334518af828833d19
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Feb 19 18:20:44 2009 +0300
+
+ mpc83xx: PCIe: Fix CONFIG_PCI_SCAN_SHOW reporting bogus values
+
+ This patch fixes an issue in config space read accessors: we should
+ fill-in the value even if we fail (e.g. skipping devices), otherwise
+ CONFIG_PCI_SCAN_SHOW reports bogus values during boot up.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit e2d72ba543c7b6924b5b5d393dcd80b2b9c3a022
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Feb 19 18:20:42 2009 +0300
+
+ mpc83xx: PCIe: Don't start bus enumeration at 0
+
+ Currently we assign first_busno = 0 for the first PCIe hose, but this
+ scheme won't work if we have ordinary PCI hose already registered (its
+ first_busno value is 0 too).
+
+ The old code worked fine only because we have PCI disabled on
+ MPC837XEMDS boards in stand-alone mode (see commit 00f7bbae92e3b13f2b3
+ "mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards").
+ But on MPC837XERDB boards we have PCI and PCIe, so the bug actually
+ triggers.
+
+ So, to fix the issue, we should use pci_last_busno() + 1 for the
+ first_busno (i.e. last available busno).
+
+ Reported-by: Huang Changming <Chang-Ming.Huang@freescale.com>
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit cc2a8c7751ddbae3116660064f446888538b93e9
+Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+Date: Thu Feb 19 18:20:41 2009 +0300
+
+ PCI: Add pci_last_busno() helper
+
+ This is just a handy routine that reports last PCI busno: we walk
+ down all the hoses and return last hose's last_busno.
+
+ Will be used by PCI/PCIe initialization code.
+
+ Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit bd76729bcbfd64b5d016a9b936f058931fc06eaf
+Author: Becky Bruce <beckyb@kernel.crashing.org>
+Date: Mon Feb 23 13:56:51 2009 -0600
+
+ MPC86xx: set CONFIG_MAX_MEM_MAPPED to 2G by default
+
+ Currently, we get 256MB as the default, but since all the 86xx
+ board configs define a 2G BAT mapping for RAM, raise default
+ to 2G.
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit 2331e18b9df0ab98ebf3ab44c0efea1311949aaa
+Author: Becky Bruce <beckyb@kernel.crashing.org>
+Date: Thu Feb 12 10:43:32 2009 -0600
+
+ mpc8641hpcn: Indicate 36-bit addr map in boot messages
+
+ If 36-bit addressing is enabled, print a message on the console
+ when we boot.
+
+ Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
+
+commit 2f70c49e5b9813635ad73666aa30f304c7fdeda9
+Author: Heiko Schocher <hs@denx.de>
+Date: Tue Feb 10 09:38:52 2009 +0100
+
+ netloop: speed up NetLoop
+
+ NetLoop polls every cycle with getenv some environment variables.
+ This is horribly slow, especially when the environment is big.
+
+ This patch reads only the environment variables in NetLoop,
+ when they were changed.
+
+ Also moved the init part of the NetLoop function in a seperate
+ function.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit ad2d16393e9f684e4a9255f42e8bfdd819b67a87
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Dec 22 02:56:07 2008 -0500
+
+ smc911x_eeprom: new example app for managing newer SMC parts
+
+ A forward port of the last version to work with the newer smc911x driver.
+ I only have a board with a LAN9218 part on it, so that is the only one
+ I've tested. But there isn't anything in this that would make it terribly
+ chip specific afaik.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ CC: Sascha Hauer <s.hauer@pengutronix.de>
+ CC: Guennadi Liakhovetski <lg@denx.de>
+ CC: Magnus Lilja <lilja.magnus@gmail.com>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 736323a490b664ec0edc3ddb2c1c4a6824db45c6
+Author: Pieter Henning <phenning@vastech.co.za>
+Date: Sun Feb 22 23:17:15 2009 -0800
+
+ Added Vitesse VSC8211 definitions to TSEC driver
+
+ Added the struct containing PHY settings for the Vitesse VSC8211 phy to
+ the phy_info list in tsec.c
+
+ Signed-off-by: Pieter Henning <phenning@vastech.co.za>
+ Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 32688e572ff96715b41420e9a7f280db6c399b65
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Feb 23 00:22:21 2009 +0100
+
+ Update CHANGELOG; Prepare 2009.03-rc1
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 80b827c2b78329c6503b271e43d9eb693d644710
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Feb 22 23:45:40 2009 +0100
+
+ ARM: synchronize mach-types.h with linux v2.6.29-rc5-315-g683fdc5
+
+ The file was generated from building versatile_defconfig.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 14209ac13ff631e36c9a9dd426c59c2e2f5dab00
+Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+Date: Sun Feb 22 14:24:11 2009 +0900
+
+ MIPS: Fix GCC-4.2 'discards qualifiers from pointer target type' warnings
+
+ Compiling dbau1x00 and gth2 boards with GCC-4.2, you would see new warnings
+ like this:
+
+ skuribay@ubuntu:u-boot.git$ ./MAKEALL dbau1000
+ Configuring for dbau1x00 board...
+ au1x00_eth.c: In function 'au1x00_send':
+ au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
+ au1x00_eth.c: In function 'au1x00_recv':
+ au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
+ au1x00_eth.c: In function 'au1x00_init':
+ au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
+ au1x00_eth.c: In function 'au1x00_recv':
+ au1x00_eth.c:211: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
+ au1x00_eth.c: In function 'au1x00_init':
+ au1x00_eth.c:252: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
+ au1x00_eth.c: In function 'au1x00_send':
+ au1x00_eth.c:158: warning: passing argument 1 of 'virt_to_phys' discards qualifiers from pointer target type
+
+ We're passing a volatile pointer to a function which is expecting a non-
+ volatile pointer. That's potentially dangerous, so gcc warns about it.
+ Confirmed with ELDK 4.2 (GCC 4.2.2) and Sourcey G++ 4.2 (GCC 4.2.3).
+
+ To fix this, we add a volatile attribute to the argument in question.
+ The virt_to_phys function in Linux kernel also does the same thing.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+ Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
+
+commit aba45c85b22f8c57fc2fedba8e948e06c2e2f5b3
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Fri Feb 20 17:51:28 2009 +0100
+
+ OMAP3: Clean up MMC code
+
+ Clean up OMAP3 MMC code:
+
+ * Convert register access to struct & readx/writex style
+ * Replace hardcode values by macros
+ * Remove macro defined twice
+
+ Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
+
+commit cfcdf4a9b361d015c0debac73fbf7c511df4a934
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Thu Feb 12 18:55:43 2009 +0100
+
+ OMAP3: Pandora: Update pin mux
+
+ Clock pin must have input enabled for MMC3 to work.
+ Also enable pull-ups for cmd/data lines to be consistent
+ with remaining MMC host pin setup.
+
+ Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
+
+commit 6530a8bf8a0274b9419141e4c2c5a235cce5380f
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Thu Feb 12 18:55:42 2009 +0100
+
+ OMAP3: Add OMAP3 auto detection
+
+ This patch adds OMAP3 cpu type auto detection based on OMAP3 register
+ and removes hardcoded values.
+
+ Signed-off-by: Steve Sakoman <sakoman@gmail.com>
+ Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
+
+commit f956fd0338f4990793a10f767929ba4963665261
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Thu Feb 12 18:55:41 2009 +0100
+
+ OMAP3: Beagle: Add board revision detection
+
+ With BeagleBoard revision C some HW changes are introduced (e.g. PinMUX)
+ which might need different software handling. For this, GPIO pin 171 (GPIO
+ module 6, offset 11) can be used to check for board revision. If this pin
+ is low, we have a rev C board. Else it must be a revision Ax or Bx board.
+
+ To handle board differences you can call function beagle_get_revision().
+ E.g.:
+
+ if (beagle_get_revision()) {
+
+ /* do special revision C stuff here */
+
+ }
+
+ Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
+
+commit 288f3cd912918b97919d13b6f7fb13fbddf74d68
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Thu Feb 12 18:55:40 2009 +0100
+
+ OMAP3: Overo: Clean up pin mux and GPIO configuration
+
+ * Make Overo GPIO114 an input for touchscreen PENDOWN
+ * Make Overo GPIO144-147 readable
+ * Make Overo EHCI pinmux match beagle rev c setup
+ * Adjust pinmux for SMSC911X network chip support
+ * Remove unnecessary GPIO setup
+ * Fix merge error in Makefile
+
+ Signed-off-by: Steve Sakoman <sakoman@gmail.com>
+ Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
+
+commit 2579019b8248e5f166e60e37065766efc8a49dbc
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Feb 22 17:08:41 2009 +0100
+
+ nmdk8815: fix onenand support
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0176c03a2469676df5bf19cf93a1a6f582f6a120
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Feb 22 17:56:50 2009 +0100
+
+ nomadik/nand: fix 'ecc512' discards qualifiers from pointer target type
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 9751a456f702ba2fcdfd1bdbc0138927ef007858
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Feb 22 17:49:43 2009 +0100
+
+ davinci: fix implicit declaration of function 'davinci_errata_workarounds'
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 4f5728987f4f9f7845688482aa2b7f2127768165
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sun Feb 22 15:49:28 2009 +0100
+
+ arm: add uart dcc support
+
+ Serial driver via the EmbeddedICE macrocell's DCC channel using
+ co-processor 14.
+
+ It does include a timeout to ensure that the system does not
+ totally freeze when there is nothing connected to read.
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 0cd18fa982f9a8c1a90ce971379a7d6408976d48
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Fri Nov 21 14:35:56 2008 -0500
+
+ ARM DaVinci: Add common peripherals and modules enable functions.
+
+ Taken all the duplicated code for enabling common modules and apply
+ software workarounds from the board specific code into common
+ functions. Also added comments explaining the workarounds
+ (from TI errata documents) and replaced some numerical bit numbers
+ with more meaningful defines.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit d3be1bcae7a8207e0a79ffd035d0e90f80378295
+Author: Alessandro Rubini <rubini@unipv.it>
+Date: Mon Feb 9 15:53:33 2009 +0100
+
+ Enable Ethernet for Nomadik 8815 Evaluation Kit
+
+ This trivially enables Ethernet support in the debug board
+ by setting up the proper chip select.
+
+ Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+ Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
+
+commit 0d8c6eab2481046e9446264bfe9402bb98ddf433
+Author: Alessandro Rubini <rubini@unipv.it>
+Date: Mon Feb 9 15:53:31 2009 +0100
+
+ Nand driver for Nomadik SoC
+
+ This driver implements the ECC algorithm described in
+ the CPU data sheet and uses the OOB layout chosen in
+ already-released development systems (shipped with a custom-made
+ u-boot 1.3.1).
+
+ Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+ Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
+
+commit ef339cc2b68e4cbef3f9376a45315e1b974bbd8d
+Author: Alessandro Rubini <rubini@unipv.it>
+Date: Mon Feb 9 15:53:31 2009 +0100
+
+ Added nomadik.h header
+
+ Signed-off-by: Alessandro Rubini <rubini@unipv.it>
+ Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
+
+commit 60ece6d8043d1dd80f5dd32c541213716d624b19
+Author: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+Date: Wed Oct 29 20:05:18 2008 +0900
+
+ r8a66597-hcd: fix cannot use external hub
+
+ Fix the problem that cannot use external hub, because this driver
+ did not control correctly a DEVADDx register.
+
+ Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ Signed-off-by: Remy Bohmer <linux@bohmer.net>
+
+commit e1ffaee728190e76a4596a3579d94e730143585f
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Feb 19 01:20:27 2009 -0500
+
+ Blackfin: disable syscontrol code for now
+
+ Looks like the initcode updates fell out of order during my merges. The
+ patch that really fixes up this code is part of power-on overhaul and so
+ is too large for merging at this point. Instead, we can disable the code
+ as no currently in-tree board depends on it. The next merge window will
+ fix things up properly.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit 1b228d68f54832edd867ef98520f760f68192ab7
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Thu Feb 19 01:19:49 2009 -0500
+
+ Blackfin: bf537-stamp: fix I2C board defines
+
+ The previous merge for cleaning up the I2C driver incorrectly reverted the
+ CFG_xxx rename for some of the I2C defines.
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 09fee8e8677a6265e89144ccc163bf00e321769e
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Feb 22 01:19:52 2009 +0100
+
+ Coding Style cleanup; update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 1dcb50afbb63a439320a985380a0af2dca079d1e
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Feb 22 01:17:47 2009 +0100
+
+ Makefile: fix cleanup
+
+ Commit e4943ec5 moved the ARM boards to a vendor directory but forgot
+ to adapt the cleanup rules in the Makefile
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
commit edff7bcc4d5540df8b416274652ff02e94c38b9e
Author: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Date: Fri Feb 20 13:01:56 2009 -0500
Signed-off-by: Wolfgang Denk <wd@denx.de>
+commit 2b68b23373f96199a0cafbfd7a9f79ed62381ebb
+Author: Heiko Schocher <hs@denx.de>
+Date: Wed Feb 11 19:26:15 2009 +0100
+
+ 83xx: add missing TIMING_CFG1_CASLAT_* defines
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit c9e34fe2e86f7b6cc8260f4b24cbdc7dd81e04c5
+Author: Valeriy Glushkov <gvv@lstec.com>
+Date: Thu Feb 5 14:35:21 2009 +0200
+
+ mpc8349itx: allow SATA boot from the onboard SIL1334
+
+ This patch allows using of SATA devices connected
+ to the onboard PCI SIL1334 SATA controller.
+
+ Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
commit e1ac387f4645499746856adc1aeaa9787da2eca6
Author: Andy Fleming <afleming@freescale.com>
Date: Thu Oct 30 16:50:14 2008 -0500
projects / platform / kernel / u-boot.git / blobdiff