======================================================================
+Changes since U-Boot 1.1.4:
+======================================================================
+
+* Added PCI support for MPC8349ADS board
+ Patch by Kumar Gala 11 Jan 2006
+
+* Add support for 28F256J3A flah (=> 64 MB) on PM520 board
+
+* Fix compiler problem with at91rm9200dk board.
+ Patch by Eugen Bigz, 19 Dec 2005
+
+======================================================================
Changes for U-Boot 1.1.4:
======================================================================
+* Changes to Yellowstone & Yosemite 440EP/GR eval boards:
+ - Changed GPIO setup to enable another address line in order to
+ address 64M of FLASH.
+ - Added function sdram_tr1_set to auto calculate the tr1 value for
+ the DDR.
+ Patch by Steven Blakeslee, 12 Dec 2005
+
+* MPC5200: Set PCI retry counter to 0 = infinite retry;
+ The default of 255 is too short for slow devices.
+ Patch by Martin Nykodym, 12 Dec 2005
+
+* Change port configuration for O2DNT (CODEC1 on PSC1).
+
+* Fix register for PCI async mode on PPC440EP
+ Patch by Youngchul Bang, 08 Dec 2005
+
+* Fix U-Boot linking problems (add .eh_frame segment to linker script)
+ This segment may be required by some libgcc.a functions
+ (like _udivdi3).
+
+* Fix DPRAM offset/size for MPC8541/8555.
+ Simplify TQM85xx Makefile handling.
+
+* Fix data overflow (typo?) in rtc/ds1302.c
+
+* Fix U-Boot compilation for MIPS boards using ELDK 4.0
+
+* Add support for TQM8541/8555 boards, TQM85xx support reworked:
+ - Support for TQM8541/8555 boards added.
+ - Complete rework of TQM8540/8560 support.
+ - Common TQM85xx code now supports all current TQM85xx platforms
+ (TQM8540/8541/8555/8560).
+ - DDR SDRAM size detection added.
+ - CAS latency default values can be overwritten by setting "serial#"
+ to e.g. "ABC0001 casl=25" -> CAS latency 2.5 will be used.
+ If problems are detected with this non default CAS latency,
+ the default values will be used instead.
+ - Flash size detection added.
+ - Moved FCC ethernet driver initialization behind TSEC driver init
+ -> TSEC is first device.
+ Patch by Stefan Roese, 30 Nov 2005
+
+* Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.
+ Patch by John Otken, 23 Nov 2005
+
+* Changed PPC44x startup message (cpu info, speed...) to common style:
+ On PPC44x platforms, the startup message generated in "cpu.c" only
+ comprised the ppc type and revision but not additional information
+ like speed etc. Those speed infos where printed in the board specific
+ code. This new implementation now prints all CPU infos in the common
+ cpu specific code. No board specific code is needed anymore and
+ therefore removed from all current 44x implementations.
+ Patch by Stefan Roese, 27 Nov 2005
+
* Adjust TQM834x PHY addresses for latest hardware revision.
* Increase malloc arena on TQM5200 board to 256 kB.
With 64 kb uniform flash sector size the old value of 128 kB was
too small.
-
+
* Fix miiphy global data initialization (problem on 4xx boards when
no ethaddr is assigned). Initialization moved from
miiphy_register() to eth_initialize().
projects / platform / kernel / u-boot.git / blobdiff