+
+# The new instructions of the System z10 Enterprise Class
+eb000000006a asi SIY_IRD "add immediate (32<8)" z10 zarch
+eb000000007a agsi SIY_IRD "add immediate (64<8)" z10 zarch
+eb000000006e alsi SIY_IRD "add logical with signed immediate (32<8)" z10 zarch
+eb000000007e algsi SIY_IRD "add logical with signed immediate (64<8)" z10 zarch
+c60d crl RIL_RP "compare relative long (32)" z10 zarch
+c608 cgrl RIL_RP "compare relative long (64)" z10 zarch
+c60c cgfrl RIL_RP "compare relative long (64<32)" z10 zarch
+ec00000000f6 crb$32 RRS_RRRD0 "compare and branch (32)" z10 zarch
+ec00000000f6 crb RRS_RRRDU "compare and branch (32)" z10 zarch
+ec00000000e4 cgrb$32 RRS_RRRD0 "compare and branch (64)" z10 zarch
+ec00000000e4 cgrb RRS_RRRDU "compare and branch (64)" z10 zarch
+ec0000000076 crj$32 RIE_RRP "compare and branch relative (32)" z10 zarch
+ec0000000076 crj RIE_RRPU "compare and branch relative (32)" z10 zarch
+ec0000000064 cgrj$32 RIE_RRP0 "compare and branch relative (64)" z10 zarch
+ec0000000064 cgrj RIE_RRPU "compare and branch relative (64)" z10 zarch
+ec00000000fe cib$12 RIS_R0RDI "compare immediate and branch (32<8)" z10 zarch
+ec00000000fe cib RIS_RURDI "compare immediate and branch (32<8)" z10 zarch
+ec00000000fc cgib$12 RIS_R0RDI "compare immediate and branch (64<8)" z10 zarch
+ec00000000fc cgib RIS_RURDI "compare immediate and branch (64<8)" z10 zarch
+ec000000007e cij$12 RIE_R0PI "compare immediate and branch relative (32<8)" z10 zarch
+ec000000007e cij RIE_RUPI "compare immediate and branch relative (32<8)" z10 zarch
+ec000000007c cgij$12 RIE_R0PI "compare immediate and branch relative (64<8)" z10 zarch
+ec000000007c cgij RIE_RUPI "compare immediate and branch relative (64<8)" z10 zarch
+b97200000000 crt$16 RRF_00RR "compare and trap" z10 zarch
+b972 crt RRF_U0RR "compare and trap" z10 zarch
+b96000000000 cgrt$16 RRF_00RR "compare and trap 64" z10 zarch
+b960 cgrt RRF_U0RR "compare and trap 64" z10 zarch
+ec0000000072 cit$32 RIE_R0I0 "compare immediate and trap (32<16)" z10 zarch
+ec0000000072 cit RIE_R0IU "compare immediate and trap (32<16)" z10 zarch
+ec0000000070 cgit$32 RIE_R0I0 "compare immediate and trap (64<16)" z10 zarch
+ec0000000070 cgit RIE_R0IU "compare immediate and trap (64<16)" z10 zarch
+e30000000034 cgh RXY_RRRD "compare halfword (64<16)" z10 zarch
+e554 chhsi SIL_RDI "compare halfword immediate (16<16)" z10 zarch
+e55c chsi SIL_RDI "compare halfword immediate (32<16)" z10 zarch
+e558 cghsi SIL_RDI "compare halfword immediate (64<16)" z10 zarch
+c605 chrl RIL_RP "compare halfword relative long (32<8)" z10 zarch
+c604 cghrl RIL_RP "compare halfword relative long (64<8)" z10 zarch
+e555 clhhsi SIL_RDU "compare logical immediate (16<16)" z10 zarch
+e55d clfhsi SIL_RDU "compare logical immediate (32<16)" z10 zarch
+e559 clghsi SIL_RDU "compare logical immediate (64<16)" z10 zarch
+c60f clrl RIL_RP "compare logical relative long (32)" z10 zarch
+c60a clgrl RIL_RP "compare logical relative long (64)" z10 zarch
+c60e clgfrl RIL_RP "compare logical relative long (64<32)" z10 zarch
+c607 clhrl RIL_RP "compare logical relative long (32<16)" z10 zarch
+c606 clghrl RIL_RP "compare logical relative long (64<16)" z10 zarch
+ec00000000f7 clrb$32 RRS_RRRD0 "compare logical and branch (32)" z10 zarch
+ec00000000f7 clrb RRS_RRRDU "compare logical and branch (32)" z10 zarch
+ec00000000e5 clgrb$32 RRS_RRRD0 "compare logical and branch (64)" z10 zarch
+ec00000000e5 clgrb RRS_RRRDU "compare logical and branch (64)" z10 zarch
+ec0000000077 clrj$32 RIE_RRP "compare logical and branch relative (32)" z10 zarch
+ec0000000077 clrj RIE_RRPU "compare logical and branch relative (32)" z10 zarch
+ec0000000065 clgrj$32 RIE_RRP "compare logical and branch relative (64)" z10 zarch
+ec0000000065 clgrj RIE_RRPU "compare logical and branch relative (64)" z10 zarch
+ec00000000ff clib$12 RIS_R0RDU "compare logical immediate and branch (32<8)" z10 zarch
+ec00000000ff clib RIS_RURDU "compare logical immediate and branch (32<8)" z10 zarch
+ec00000000fd clgib$12 RIS_R0RDU "compare logical immediate and branch (64<8)" z10 zarch
+ec00000000fd clgib RIS_RURDU "compare logical immediate and branch (64<8)" z10 zarch
+ec000000007f clij$12 RIE_R0PU "compare logical immediate and branch relative (32<8)" z10 zarch
+ec000000007f clij RIE_RUPU "compare logical immediate and branch relative (32<8)" z10 zarch
+ec000000007d clgij$12 RIE_R0PU "compare logical immediate and branch relative (64<8)" z10 zarch
+ec000000007d clgij RIE_RUPU "compare logical immediate and branch relative (64<8)" z10 zarch
+b97300000000 clrt$16 RRF_00RR "compare logical and trap (32)" z10 zarch
+b973 clrt RRF_U0RR "compare logical and trap (32)" z10 zarch
+b96100000000 clgrt$16 RRF_00RR "compare logical and trap (64)" z10 zarch
+b961 clgrt RRF_U0RR "compare logical and trap (64)" z10 zarch
+ec0000000073 clfit$32 RIE_R0U0 "compare logical and trap (32<16)" z10 zarch
+ec0000000073 clfit RIE_R0UU "compare logical and trap (32<16)" z10 zarch
+ec0000000071 clgit$32 RIE_R0U0 "compare logical and trap (64<16)" z10 zarch
+ec0000000071 clgit RIE_R0UU "compare logical and trap (64<16)" z10 zarch
+eb000000004c ecag RSY_RRRD "extract cache attribute" z10 zarch
+c40d lrl RIL_RP "load relative long (32)" z10 zarch
+c408 lgrl RIL_RP "load relative long (64)" z10 zarch
+c40c lgfrl RIL_RP "load relative long (64<32)" z10 zarch
+e30000000075 laey RXY_RRRD "load address extended" z10 zarch
+e30000000032 ltgf RXY_RRRD "load and test (64<32)" z10 zarch
+c405 lhrl RIL_RP "load halfword relative long (32<16)" z10 zarch
+c404 lghrl RIL_RP "load halfword relative long (64<16)" z10 zarch
+c40e llgfrl RIL_RP "load logical relative long (64<32)" z10 zarch
+c402 llhrl RIL_RP "load logical halfword relative long (32<16)" z10 zarch
+c406 llghrl RIL_RP "load logical halfword relative long (64<16)" z10 zarch
+e544 mvhhi SIL_RDI "move (16<16)" z10 zarch
+e54c mvhi SIL_RDI "move (32<16)" z10 zarch
+e548 mvghi SIL_RDI "move (64<16)" z10 zarch
+e3000000005c mfy RXY_RERRD "multiply" z10 zarch
+e3000000007c mhy RXY_RRRD "multiply halfword" z10 zarch
+c201 msfi RIL_RI "multiply single immediate (32)" z10 zarch
+c200 msgfi RIL_RI "multiply single immediate (64)" z10 zarch
+e30000000036 pfd RXY_URRD "prefetch data" z10 zarch
+c602 pfdrl RIL_UP "prefetch data relative long" z10 zarch
+ec0000000054 rnsbg RIE_RRUUU "rotate then and selected bits" z10 zarch
+ec0000000057 rxsbg RIE_RRUUU "rotate then exclusive or selected bits" z10 zarch
+ec0000000056 rosbg RIE_RRUUU "rotate then or selected bits" z10 zarch
+ec0000000055 risbg RIE_RRUUU "rotate then insert selected bits" z10 zarch
+c40f strl RIL_RP "store relative long (32)" z10 zarch
+c40b stgrl RIL_RP "store relative long (64)" z10 zarch
+c407 sthrl RIL_RP "store halfword relative long" z10 zarch
+c600 exrl RIL_RP "execute relative long" z10 zarch
+af00 mc SI_URD "monitor call" z10 zarch
+b9a2 ptf RRE_R0 "perform topology function" z10 zarch
+b9af pfmf RRE_RR "perform frame management function" z10 zarch
+b9bf trte RRF_M0RER "translate and test extended" z10 zarch
+b9bd trtre RRF_M0RER "translate and test reverse extended" z10 zarch
+b2ed ecpga RRE_RR "extract coprocessor-group address" z10 zarch
+b2e4 ecctr RRE_RR "extract cpu counter" z10 zarch
+b2e5 epctr RRE_RR "extract peripheral counter" z10 zarch
+b284 lcctl S_RD "load cpu-counter-set controls" z10 zarch
+b285 lpctl S_RD "load peripheral-counter-set controls" z10 zarch
+b287 lsctl S_RD "load sampling controls" z10 zarch
+b28e qctri S_RD "query counter information" z10 zarch
+b286 qsi S_RD "query sampling information" z10 zarch
+b2e0 scctr RRE_RR "set cpu counter" z10 zarch
+b2e1 spctr RRE_RR "set peripheral counter" z10 zarch
+b280 lpp S_RD "load program parameter" z10 zarch
+b928 pckmo RRE_00 "perform cryptographic key management operation" z10 zarch
+
+# The new instructions of the IBM zEnterprise z196
+b9c8 ahhhr RRF_R0RR2 "add high high" z196 zarch
+b9d8 ahhlr RRF_R0RR2 "add high low" z196 zarch
+cc08 aih RIL_RI "add immediate high" z196 zarch
+b9ca alhhhr RRF_R0RR2 "add logical high high" z196 zarch
+b9da alhhlr RRF_R0RR2 "add logical high low" z196 zarch
+cc0a alsih RIL_RI "add logical with signed immediate high with cc" z196 zarch
+cc0b alsihn RIL_RI "add logical with signed immediate high no cc" z196 zarch
+cc06 brcth RIL_RP "branch relative on count high" z196 zarch
+b9cd chhr RRE_RR "compare high high" z196 zarch
+b9dd chlr RRE_RR "compare high low" z196 zarch
+e300000000cd chf RXY_RRRD "compare high" z196 zarch
+cc0d cih RIL_RI "compare immediate high" z196 zarch
+b9cf clhhr RRE_RR "compare logical high high" z196 zarch
+b9df clhlr RRE_RR "compare logical high low" z196 zarch
+e300000000cf clhf RXY_RRRD "compare logical high" z196 zarch
+cc0f clih RIL_RU "compare logical immediate" z196 zarch
+e300000000c0 lbh RXY_RRRD "load byte high" z196 zarch
+e300000000c4 lhh RXY_RRRD "load halfword high" z196 zarch
+e300000000ca lfh RXY_RRRD "load high" z196 zarch
+e300000000c2 llch RXY_RRRD "load logical character high" z196 zarch
+e300000000c6 llhh RXY_RRRD "load logical halfword high" z196 zarch
+ec000000005d risbhg RIE_RRUUU "rotate then insert selected bits high" z196 zarch
+ec0000000051 risblg RIE_RRUUU "rotate then insert selected bits low" z196 zarch
+e300000000c3 stch RXY_RRRD "store character high" z196 zarch
+e300000000c7 sthh RXY_RRRD "store halfword high" z196 zarch
+e300000000cb stfh RXY_RRRD "store high" z196 zarch
+b9c9 shhhr RRF_R0RR2 "subtract high high" z196 zarch
+b9d9 shhlr RRF_R0RR2 "subtract high low" z196 zarch
+b9cb slhhhr RRF_R0RR2 "subtract logical high high" z196 zarch
+b9db slhhlr RRF_R0RR2 "subtract logical high low" z196 zarch
+eb00000000f8 laa RSY_RRRD "load and add 32 bit" z196 zarch
+eb00000000e8 laag RSY_RRRD "load and add 64 bit" z196 zarch
+eb00000000fa laal RSY_RRRD "load and add logical 32 bit" z196 zarch
+eb00000000ea laalg RSY_RRRD "load and add logical 64 bit" z196 zarch
+eb00000000f4 lan RSY_RRRD "load and and 32 bit" z196 zarch
+eb00000000e4 lang RSY_RRRD "load and and 64 bit" z196 zarch
+eb00000000f7 lax RSY_RRRD "load and exclusive or 32 bit" z196 zarch
+eb00000000e7 laxg RSY_RRRD "load and exclusive or 64 bit" z196 zarch
+eb00000000f6 lao RSY_RRRD "load and or 32 bit" z196 zarch
+eb00000000e6 laog RSY_RRRD "load and or 64 bit" z196 zarch
+c804 lpd SSF_RERDRD2 "load pair disjoint 32 bit" z196 zarch
+c805 lpdg SSF_RERDRD2 "load pair disjoint 64 bit" z196 zarch
+b9f2 locr RRF_U0RR "load on condition 32 bit" z196 zarch
+b9f200000000 locr*16 RRF_00RR "load on condition 32 bit" z196 zarch
+b9e2 locgr RRF_U0RR "load on condition 64 bit" z196 zarch
+b9e200000000 locgr*16 RRF_00RR "load on condition 64 bit" z196 zarch
+eb00000000f2 loc RSY_RURD2 "load on condition 32 bit" z196 zarch
+eb00000000f2 loc*12 RSY_R0RD "load on condition 32 bit" z196 zarch
+eb00000000e2 locg RSY_RURD2 "load on condition 64 bit" z196 zarch
+eb00000000e2 locg*12 RSY_R0RD "load on condition 64 bit" z196 zarch
+eb00000000f3 stoc RSY_RURD2 "store on condition 32 bit" z196 zarch
+eb00000000f3 stoc*12 RSY_R0RD "store on condition 32 bit" z196 zarch
+eb00000000e3 stocg RSY_RURD2 "store on condition 64 bit" z196 zarch
+eb00000000e3 stocg*12 RSY_R0RD "store on condition 64 bit" z196 zarch
+b9f8 ark RRF_R0RR2 "add 3 operands 32 bit" z196 zarch
+b9e8 agrk RRF_R0RR2 "add 3 operands 64 bit" z196 zarch
+ec00000000d8 ahik RIE_RRI0 "add immediate 3 operands 32 bit" z196 zarch
+ec00000000d9 aghik RIE_RRI0 "add immediate 3 operands 64 bit" z196 zarch
+b9fa alrk RRF_R0RR2 "add logical 3 operands 32 bit" z196 zarch
+b9ea algrk RRF_R0RR2 "add logical 3 operands 64 bit" z196 zarch
+ec00000000da alhsik RIE_RRI0 "add logical immediate 3 operands 32 bit" z196 zarch
+ec00000000db alghsik RIE_RRI0 "add logical immediate 3 operands 64 bit" z196 zarch
+b9f4 nrk RRF_R0RR2 "and 3 operands 32 bit" z196 zarch
+b9e4 ngrk RRF_R0RR2 "and 3 operands 64 bit" z196 zarch
+b9f7 xrk RRF_R0RR2 "xor 3 operands 32 bit" z196 zarch
+b9e7 xgrk RRF_R0RR2 "xor 3 operands 64 bit" z196 zarch
+b9f6 ork RRF_R0RR2 "or 3 operands 32 bit" z196 zarch
+b9e6 ogrk RRF_R0RR2 "or 3 operands 64 bit" z196 zarch
+eb00000000dd slak RSY_RRRD "shift left single 3 operands 32 bit" z196 zarch
+eb00000000df sllk RSY_RRRD "shift left single logical 3 operands 32 bit" z196 zarch
+eb00000000dc srak RSY_RRRD "shift right single 3 operands 32 bit" z196 zarch
+eb00000000de srlk RSY_RRRD "shift right single logical 3 operands 32 bit" z196 zarch
+b9f9 srk RRF_R0RR2 "subtract 3 operands 32 bit" z196 zarch
+b9e9 sgrk RRF_R0RR2 "subtract 3 operands 64 bit" z196 zarch
+b9fb slrk RRF_R0RR2 "subtract logical 3 operands 32 bit" z196 zarch
+b9eb slgrk RRF_R0RR2 "subtract logical 3 operands 64 bit" z196 zarch
+b9e1 popcnt RRE_RR "population count" z196 zarch
+b9ae rrbm RRE_RR "reset reference bits multiple" z196 zarch
+b394 cefbra RRF_UUFR "convert from 32 bit fixed to short bfp with rounding mode" z196 zarch
+b395 cdfbra RRF_UUFR "convert from 32 bit fixed to long bfp with rounding mode" z196 zarch
+b396 cxfbra RRF_UUFER "convert from 32 bit fixed to extended bfp with rounding mode" z196 zarch
+b3a4 cegbra RRF_UUFR "convert from 64 bit fixed to short bfp with rounding mode" z196 zarch
+b3a5 cdgbra RRF_UUFR "convert from 64 bit fixed to long bfp with rounding mode" z196 zarch
+b3a6 cxgbra RRF_UUFER "convert from 64 bit fixed to extended bfp with rounding mode" z196 zarch
+b390 celfbr RRF_UUFR "convert from 32 bit logical fixed to short bfp with rounding mode" z196 zarch
+b391 cdlfbr RRF_UUFR "convert from 32 bit logical fixed to long bfp with rounding mode" z196 zarch
+b392 cxlfbr RRF_UUFER "convert from 32 bit logical fixed to extended bfp with rounding mode" z196 zarch
+b3a0 celgbr RRF_UUFR "convert from 64 bit logical fixed to short bfp with rounding mode" z196 zarch
+b3a1 cdlgbr RRF_UUFR "convert from 64 bit logical fixed to long bfp with rounding mode" z196 zarch
+b3a2 cxlgbr RRF_UUFER "convert from 64 bit logical fixed to extended bfp with rounding mode" z196 zarch
+b398 cfebra RRF_UURF "convert to 32 bit fixed from short bfp with rounding mode" z196 zarch
+b399 cfdbra RRF_UURF "convert to 32 bit fixed from long bfp with rounding mode" z196 zarch
+b39a cfxbra RRF_UURFE "convert to 32 bit fixed from extended bfp with rounding mode" z196 zarch
+b3a8 cgebra RRF_UURF "convert to 64 bit fixed from short bfp with rounding mode" z196 zarch
+b3a9 cgdbra RRF_UURF "convert to 64 bit fixed from long bfp with rounding mode" z196 zarch
+b3aa cgxbra RRF_UURFE "convert to 64 bit fixed from extended bfp with rounding mode" z196 zarch
+b39c clfebr RRF_UURF "convert to 32 bit fixed logical from short bfp with rounding mode" z196 zarch
+b39d clfdbr RRF_UURF "convert to 32 bit fixed logical from long bfp with rounding mode" z196 zarch
+b39e clfxbr RRF_UURFE "convert to 32 bit fixed logical from extended bfp with rounding mode" z196 zarch
+b3ac clgebr RRF_UURF "convert to 64 bit fixed logical from short bfp with rounding mode" z196 zarch
+b3ad clgdbr RRF_UURF "convert to 64 bit fixed logical from long bfp with rounding mode" z196 zarch
+b3ae clgxbr RRF_UURFE "convert to 64 bit fixed logical from extended bfp with rounding mode" z196 zarch
+b357 fiebra RRF_UUFF "load fp integer short bfp with inexact suppression" z196 zarch
+b35f fidbra RRF_UUFF "load fp integer long bfp with inexact suppression" z196 zarch
+b347 fixbra RRF_UUFEFE "load fp integer extended bfp with inexact suppression" z196 zarch
+b344 ledbra RRF_UUFF "load rounded short/long bfp to short/long bfp with rounding mode" z196 zarch
+b345 ldxbra RRF_UUFEFE "load rounded long/extended bfp to long/extended bfp with rounding mode" z196 zarch
+b346 lexbra RRF_UUFEFE "load rounded short/extended bfp to short/extended bfp with rounding mode" z196 zarch
+b3d2 adtra RRF_FUFF2 "add long dfp with rounding mode" z196 zarch
+b3da axtra RRF_FEUFEFE2 "add extended dfp with rounding mode" z196 zarch
+b3f1 cdgtra RRF_UUFR "convert from fixed long dfp with rounding mode" z196 zarch
+b951 cdftr RRF_UUFR "convert from 32 bit fixed to long dfp with rounding mode" z196 zarch
+b959 cxftr RRF_UUFER "convert from 32 bit fixed to extended dfp with rounding mode" z196 zarch
+b3f9 cxgtra RRF_UUFER "convert from fixed extended dfp with rounding mode" z196 zarch
+b952 cdlgtr RRF_UUFR "convert from 64 bit fixed logical to long dfp with rounding mode" z196 zarch
+b95a cxlgtr RRF_UUFER "convert from 64 bit fixed logical to extended dfp with rounding mode" z196 zarch
+b953 cdlftr RRF_UUFR "convert from 32 bit fixed logical to long dfp with rounding mode" z196 zarch
+b95b cxlftr RRF_UUFR "convert from 32 bit fixed logical to extended dfp with rounding mode" z196 zarch
+b3e1 cgdtra RRF_UURF "convert to 64 bit fixed from long dfp with rounding mode" z196 zarch
+b3e9 cgxtra RRF_UURFE "convert to 64 bit fixed from extended dfp with rounding mode" z196 zarch
+b941 cfdtr RRF_UURF "convert to 32 bit fixed from long dfp source with rounding mode" z196 zarch
+b949 cfxtr RRF_UURF "convert to 32 bit fixed from extended dfp source with rounding mode" z196 zarch
+b942 clgdtr RRF_UURF "convert to 64 bit fixed logical from long dfp with rounding mode" z196 zarch
+b94a clgxtr RRF_UURFE "convert to 64 bit fixed logical from extended dfp with rounding mode" z196 zarch
+b943 clfdtr RRF_UURF "convert to 32 bit fixed logical from long dfp with rounding mode" z196 zarch
+b94b clfxtr RRF_UURFE "convert to 32 bit fixed logical from extended dfp with rounding mode" z196 zarch
+b3d1 ddtra RRF_FUFF2 "divide long dfp with rounding mode" z196 zarch
+b3d9 dxtra RRF_FEUFEFE2 "divide extended dfp with rounding mode" z196 zarch
+b3d0 mdtra RRF_FUFF2 "multiply long dfp with rounding mode" z196 zarch
+b3d8 mxtra RRF_FEUFEFE2 "multiply extended dfp with rounding mode" z196 zarch
+b3d3 sdtra RRF_FUFF2 "subtract long dfp with rounding mode" z196 zarch
+b3db sxtra RRF_FEUFEFE2 "subtract extended dfp with rounding mode" z196 zarch
+b2b8 srnmb S_RD "set 3 bit bfp rounding mode" z196 zarch
+b92a kmf RRE_RR "cipher message with CFB" z196 zarch
+b92b kmo RRE_RR "cipher message with OFB" z196 zarch
+b92c pcc RRE_00 "perform cryptographic computation" z196 zarch
+b92d kmctr RRF_R0RR2 "cipher message with counter" z196 zarch
+
+# The new instructions of the IBM zEnterprise EC12
+b2ec etnd RRE_R0 "extract transaction nesting depth" zEC12 zarch
+e30000000025 ntstg RXY_RRRD "nontransactional store" zEC12 zarch
+b2fc tabort S_RD "transaction abort" zEC12 zarch
+e560 tbegin SIL_RDU "transaction begin" zEC12 zarch
+e561 tbeginc SIL_RDU "constrained transaction begin" zEC12 zarch
+b2f8 tend S_00 "transaction end" zEC12 zarch
+c7 bpp SMI_U0RDP "branch prediction preload" zEC12 zarch
+c5 bprp MII_UPP "branch prediction relative preload" zEC12 zarch
+b2e8 ppa RRF_U0RR "perform processor assist" zEC12 zarch
+b2fa niai IE_UU "next instruction access intent" zEC12 zarch
+b98f crdte RRF_RMRR "compare and replace DAT table entry" zEC12 zarch
+e3000000009f lat RXY_RRRD "load and trap 32 bit" zEC12 zarch
+e30000000085 lgat RXY_RRRD "load and trap 64 bit" zEC12 zarch
+e300000000c8 lfhat RXY_RRRD "load high and trap" zEC12 zarch
+e3000000009d llgfat RXY_RRRD "load logical and trap 32>64" zEC12 zarch
+e3000000009c llgtat RXY_RRRD "load logical thirty one bits and trap 31>64" zEC12 zarch
+eb0000000023 clt RSY_RURD "compare logical and trap 32 bit reg-mem" zEC12 zarch
+eb0000000023 clt$12 RSY_R0RD "compare logical and trap 32 bit reg-mem" zEC12 zarch
+eb000000002b clgt RSY_RURD "compare logical and trap 64 bit reg-mem" zEC12 zarch
+eb000000002b clgt$12 RSY_R0RD "compare logical and trap 64 bit reg-mem" zEC12 zarch
+ec0000000059 risbgn RIE_RRUUU "rotate then insert selected bits nocc" zEC12 zarch
+ed00000000aa cdzt RSL_LRDFU "convert from zoned long" zEC12 zarch
+ed00000000ab cxzt RSL_LRDFEU "convert from zoned extended" zEC12 zarch
+ed00000000a8 czdt RSL_LRDFU "convert to zoned long" zEC12 zarch
+ed00000000a9 czxt RSL_LRDFEU "convert to zoned extended" zEC12 zarch