+2019-02-08 Jim Wilson <jimw@sifive.com>
+
+ * riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
+ <bne>: Likewise.
+
+2019-02-07 Tamar Christina <tamar.christina@arm.com>
+
+ * arm-dis.c (arm_opcodes): Redefine hlt to armv1.
+
+2019-02-07 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/23212
+ * aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
+ * aarch64-opc.c (verify_elem_sd): New.
+ (fields): Add FLD_sz entr.
+ * aarch64-tbl.h (_SIMD_INSN): New.
+ (aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
+ fmulx scalar and vector by element isns.
+
+2019-02-07 Nick Clifton <nickc@redhat.com>
+
+ * po/sv.po: Updated Swedish translation.
+
+2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
+
+ * s390-mkopc.c (main): Accept arch13 as cpu string.
+ * s390-opc.c: Add new instruction formats and instruction opcode
+ masks.
+ * s390-opc.txt: Add new arch13 instructions.
+