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Merge branch 'master' of git://git.denx.de/u-boot-fdt
[platform/kernel/u-boot.git]
/
include
/
ppc4xx.h
diff --git
a/include/ppc4xx.h
b/include/ppc4xx.h
index
59a3b06
..
f147885
100644
(file)
--- a/
include/ppc4xx.h
+++ b/
include/ppc4xx.h
@@
-107,8
+107,8
@@
* Enable long long (%ll ...) printf format on 440 PPC's since most of
* them support 36bit physical addressing
*/
* Enable long long (%ll ...) printf format on 440 PPC's since most of
* them support 36bit physical addressing
*/
-#define C
FG
_64BIT_VSPRINTF
-#define C
FG
_64BIT_STRTOUL
+#define C
ONFIG_SYS
_64BIT_VSPRINTF
+#define C
ONFIG_SYS
_64BIT_STRTOUL
#include <ppc440.h>
#else
#include <ppc405.h>
#include <ppc440.h>
#else
#include <ppc405.h>
@@
-143,7
+143,7
@@
#define _START_OFFSET (EXC_OFF_SYS_RESET + 0x2000)
#define RESET_VECTOR 0xfffffffc
#define _START_OFFSET (EXC_OFF_SYS_RESET + 0x2000)
#define RESET_VECTOR 0xfffffffc
-#define CACHELINE_MASK (C
FG
_CACHELINE_SIZE - 1) /* Address mask for cache
+#define CACHELINE_MASK (C
ONFIG_SYS
_CACHELINE_SIZE - 1) /* Address mask for cache
line aligned data. */
#define CPR0_DCR_BASE 0x0C
line aligned data. */
#define CPR0_DCR_BASE 0x0C
@@
-203,6
+203,22
@@
typedef struct
unsigned long pllPlbDiv;
} PPC4xx_SYS_INFO;
unsigned long pllPlbDiv;
} PPC4xx_SYS_INFO;
+static inline u32 get_mcsr(void)
+{
+ u32 val;
+
+ asm volatile("mfspr %0, 0x23c" : "=r" (val) :);
+ return val;
+}
+
+static inline void set_mcsr(u32 val)
+{
+ asm volatile("mtspr 0x23c, %0" : "=r" (val) :);
+}
+
#endif /* __ASSEMBLY__ */
#endif /* __ASSEMBLY__ */
+/* for multi-cpu support */
+#define NA_OR_UNKNOWN_CPU -1
+
#endif /* __PPC4XX_H__ */
#endif /* __PPC4XX_H__ */