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Prepare v2023.10
[platform/kernel/u-boot.git]
/
include
/
dwmmc.h
diff --git
a/include/dwmmc.h
b/include/dwmmc.h
index
0f9d51b
..
136a95b
100644
(file)
--- a/
include/dwmmc.h
+++ b/
include/dwmmc.h
@@
-7,8
+7,10
@@
#ifndef __DWMMC_HW_H
#define __DWMMC_HW_H
#ifndef __DWMMC_HW_H
#define __DWMMC_HW_H
+#include <asm/cache.h>
#include <asm/io.h>
#include <mmc.h>
#include <asm/io.h>
#include <mmc.h>
+#include <linux/bitops.h>
#define DWMCI_CTRL 0x000
#define DWMCI_PWREN 0x004
#define DWMCI_CTRL 0x000
#define DWMCI_PWREN 0x004
@@
-56,6
+58,7
@@
#define DWMCI_INTMSK_DTO (1 << 3)
#define DWMCI_INTMSK_TXDR (1 << 4)
#define DWMCI_INTMSK_RXDR (1 << 5)
#define DWMCI_INTMSK_DTO (1 << 3)
#define DWMCI_INTMSK_TXDR (1 << 4)
#define DWMCI_INTMSK_RXDR (1 << 5)
+#define DWMCI_INTMSK_RCRC (1 << 6)
#define DWMCI_INTMSK_DCRC (1 << 7)
#define DWMCI_INTMSK_RTO (1 << 8)
#define DWMCI_INTMSK_DRTO (1 << 9)
#define DWMCI_INTMSK_DCRC (1 << 7)
#define DWMCI_INTMSK_RTO (1 << 8)
#define DWMCI_INTMSK_DRTO (1 << 9)
@@
-129,6
+132,13
@@
/* UHS register */
#define DWMCI_DDR_MODE (1 << 16)
/* UHS register */
#define DWMCI_DDR_MODE (1 << 16)
+/* Internal IDMAC interrupt defines */
+#define DWMCI_IDINTEN_RI BIT(1)
+#define DWMCI_IDINTEN_TI BIT(0)
+
+#define DWMCI_IDINTEN_MASK (DWMCI_IDINTEN_TI | \
+ DWMCI_IDINTEN_RI)
+
/* quirks */
#define DWMCI_QUIRK_DISABLE_SMU (1 << 0)
/* quirks */
#define DWMCI_QUIRK_DISABLE_SMU (1 << 0)
@@
-164,7
+174,7
@@
struct dwmci_host {
struct mmc *mmc;
void *priv;
struct mmc *mmc;
void *priv;
-
void
(*clksel)(struct dwmci_host *host);
+
int
(*clksel)(struct dwmci_host *host);
void (*board_init)(struct dwmci_host *host);
/**
void (*board_init)(struct dwmci_host *host);
/**
@@
-246,10
+256,10
@@
static inline u8 dwmci_readb(struct dwmci_host *host, int reg)
* ...
*
* Inside U_BOOT_DRIVER():
* ...
*
* Inside U_BOOT_DRIVER():
- * .plat
data_auto_alloc_size
= sizeof(struct rockchip_mmc_plat),
+ * .plat
_auto
= sizeof(struct rockchip_mmc_plat),
*
* To access platform data:
*
* To access platform data:
- * struct rockchip_mmc_plat *plat = dev_get_plat
data
(dev);
+ * struct rockchip_mmc_plat *plat = dev_get_plat(dev);
*
* See rockchip_dw_mmc.c for an example.
*
*
* See rockchip_dw_mmc.c for an example.
*
@@
-274,7
+284,7
@@
void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host,
* @cfg: Empty configuration structure (generally &plat->cfg). This is
* normally all zeroes at this point. The only purpose of passing
* this in is to set mmc->cfg to it.
* @cfg: Empty configuration structure (generally &plat->cfg). This is
* normally all zeroes at this point. The only purpose of passing
* this in is to set mmc->cfg to it.
- *
@return
0 if OK, -ve if the block device could not be created
+ *
Return:
0 if OK, -ve if the block device could not be created
*/
int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
*/
int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
@@
-287,7
+297,7
@@
int dwmci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg);
* @host: DWMMC host structure
* @max_clk: Maximum supported clock speed in HZ (e.g. 150000000)
* @min_clk: Minimum supported clock speed in HZ (e.g. 400000)
* @host: DWMMC host structure
* @max_clk: Maximum supported clock speed in HZ (e.g. 150000000)
* @min_clk: Minimum supported clock speed in HZ (e.g. 400000)
- *
@return
0 if OK, -ve on error
+ *
Return:
0 if OK, -ve on error
*/
int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
#endif /* !CONFIG_BLK */
*/
int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk);
#endif /* !CONFIG_BLK */