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Merge git://git.denx.de/u-boot-socfpga
[platform/kernel/u-boot.git]
/
include
/
configs
/
vf610twr.h
diff --git
a/include/configs/vf610twr.h
b/include/configs/vf610twr.h
index
80a501e
..
ba85bc9
100644
(file)
--- a/
include/configs/vf610twr.h
+++ b/
include/configs/vf610twr.h
@@
-1,9
+1,8
@@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale Vybrid vf610twr board.
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale Vybrid vf610twr board.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
*/
#ifndef __CONFIG_H
@@
-20,10
+19,6
@@
/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG
/* Enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG
-#ifdef CONFIG_CMD_FUSE
-#define CONFIG_MXC_OCOTP
-#endif
-
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
@@
-38,16
+33,12
@@
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
/* Dynamic MTD partition support */
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
/* Dynamic MTD partition support */
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
#endif
#endif
-#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_NUM 1
#define CONFIG_FEC_MXC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_NUM 1
#define CONFIG_FEC_MXC
-#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
@@
-183,7
+174,6
@@
#define CONFIG_SYS_MEMTEST_END 0x87C00000
/* Physical memory map */
#define CONFIG_SYS_MEMTEST_END 0x87C00000
/* Physical memory map */
-#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM (0x80000000)
#define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
#define PHYS_SDRAM (0x80000000)
#define PHYS_SDRAM_SIZE (128 * 1024 * 1024)