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hush.c: Move default CONFIG_SYS_PROMPT_HUSH_PS2 to hush.c
[platform/kernel/u-boot.git]
/
include
/
configs
/
trizepsiv.h
diff --git
a/include/configs/trizepsiv.h
b/include/configs/trizepsiv.h
index
bfa7157
..
b4ec8f0
100644
(file)
--- a/
include/configs/trizepsiv.h
+++ b/
include/configs/trizepsiv.h
@@
-40,15
+40,16
@@
* High Level Configuration Options
* (easy to change)
*/
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_
PXA27X
1 /* This is an PXA27x CPU */
+#define CONFIG_
CPU_PXA27X
1 /* This is an PXA27x CPU */
#define CONFIG_MMC 1
#define CONFIG_MMC 1
-#define BOARD_LATE_INIT 1
+#define CONFIG_BOARD_LATE_INIT
+#define CONFIG_SYS_TEXT_BASE 0x0
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* we will never enable dcache, because we have to setup MMU first */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* we will never enable dcache, because we have to setup MMU first */
-#define CONFIG_SYS_
NO_DCACHE
+#define CONFIG_SYS_
DCACHE_OFF
#define RTC
#define RTC
@@
-56,7
+57,6
@@
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
/*
* Hardware drivers
/*
* Hardware drivers
@@
-150,7
+150,6
@@
* Miscellaneous configurable options
*/
#define CONFIG_SYS_HUSH_PARSER 1
* Miscellaneous configurable options
*/
#define CONFIG_SYS_HUSH_PARSER 1
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#ifdef CONFIG_SYS_HUSH_PARSER
@@
-172,9
+171,6
@@
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
- /* valid baudrates */
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
#ifdef CONFIG_MMC
#define CONFIG_PXA_MMC
#define CONFIG_CMD_MMC
#ifdef CONFIG_MMC
#define CONFIG_PXA_MMC
#define CONFIG_CMD_MMC
@@
-212,6
+208,9
@@
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
/*
* GPIO settings
*/
/*
* GPIO settings
*/
@@
-239,11
+238,17
@@
#define CONFIG_SYS_GRER1_VAL 0x00000000
#define CONFIG_SYS_GRER2_VAL 0x00000000
#define CONFIG_SYS_GRER3_VAL 0x00000000
#define CONFIG_SYS_GRER1_VAL 0x00000000
#define CONFIG_SYS_GRER2_VAL 0x00000000
#define CONFIG_SYS_GRER3_VAL 0x00000000
-#define CONFIG_SYS_GFER0_VAL 0x00000000
+
#define CONFIG_SYS_GFER1_VAL 0x00000000
#define CONFIG_SYS_GFER1_VAL 0x00000000
-#define CONFIG_SYS_GFER2_VAL 0x00000000
#define CONFIG_SYS_GFER3_VAL 0x00000020
#define CONFIG_SYS_GFER3_VAL 0x00000020
+#if CONFIG_POLARIS
+#define CONFIG_SYS_GFER0_VAL 0x00000001
+#define CONFIG_SYS_GFER2_VAL 0x00200000
+#else
+#define CONFIG_SYS_GFER0_VAL 0x00000000
+#define CONFIG_SYS_GFER2_VAL 0x00000000
+#endif
#define CONFIG_SYS_PSSR_VAL 0x20 /* CHECK */
#define CONFIG_SYS_PSSR_VAL 0x20 /* CHECK */
@@
-259,7
+264,11
@@
#define CONFIG_SYS_MSC0_VAL 0x4df84df0
#define CONFIG_SYS_MSC1_VAL 0x7ff87ff4
#define CONFIG_SYS_MSC0_VAL 0x4df84df0
#define CONFIG_SYS_MSC1_VAL 0x7ff87ff4
+#if CONFIG_POLARIS
+#define CONFIG_SYS_MSC2_VAL 0xa2697ff8
+#else
#define CONFIG_SYS_MSC2_VAL 0xa26936d4
#define CONFIG_SYS_MSC2_VAL 0xa26936d4
+#endif
#define CONFIG_SYS_MDCNFG_VAL 0x880009C9
#define CONFIG_SYS_MDREFR_VAL 0x20ca201e
#define CONFIG_SYS_MDMRS_VAL 0x00220022
#define CONFIG_SYS_MDCNFG_VAL 0x880009C9
#define CONFIG_SYS_MDREFR_VAL 0x20ca201e
#define CONFIG_SYS_MDMRS_VAL 0x00220022
@@
-278,9
+287,14
@@
#define CONFIG_SYS_MCIO0_VAL 0x00008407
#define CONFIG_SYS_MCIO1_VAL 0x0000c108
#define CONFIG_SYS_MCIO0_VAL 0x00008407
#define CONFIG_SYS_MCIO1_VAL 0x0000c108
-#define CONFIG_NET_MULTI 1
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DRIVER_DM9000 1
-#define CONFIG_DM9000_BASE 0x08000000
+
+#if CONFIG_POLARIS
+#define CONFIG_DM9000_BASE 0x0C800000
+#else
+#define CONFIG_DM9000_BASE 0x08000000
+#endif
+
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE+0x8004)
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE+0x8004)
@@
-312,6
+326,9
@@
/* write flash less slowly */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
/* write flash less slowly */
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
+/* Unlock to be used with Intel chips */
+#define CONFIG_SYS_FLASH_PROTECTION 1
+
/* Flash environment locations */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) /* Addr of Environment Sector */
/* Flash environment locations */
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) /* Addr of Environment Sector */