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configs: move CONFIG_SPL_TEXT_BASE to Kconfig
[platform/kernel/u-boot.git]
/
include
/
configs
/
tricorder.h
diff --git
a/include/configs/tricorder.h
b/include/configs/tricorder.h
index
6b4edcc
..
683375a
100644
(file)
--- a/
include/configs/tricorder.h
+++ b/
include/configs/tricorder.h
@@
-30,8
+30,6
@@
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
-#define CONFIG_MISC_INIT_R
-
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
@@
-49,7
+47,6
@@
/* select serial console configuration */
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
/* select serial console configuration */
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_SERIAL3 3
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200}
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200}
@@
-62,7
+59,6
@@
#define CONFIG_SYS_EEPROM_BUS_NUM 1
/* TWL4030 */
#define CONFIG_SYS_EEPROM_BUS_NUM 1
/* TWL4030 */
-#define CONFIG_TWL4030_LED
/* Board NAND Info */
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* Board NAND Info */
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
@@
-198,7
+194,6
@@
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
/* Physical Memory Map */
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
@@
-224,7
+219,6
@@
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
-#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
CONFIG_SPL_TEXT_BASE)