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Remove various unused interrupt related code
[platform/kernel/u-boot.git]
/
include
/
configs
/
tqma6.h
diff --git
a/include/configs/tqma6.h
b/include/configs/tqma6.h
index
1c0a762
..
1bfc438
100644
(file)
--- a/
include/configs/tqma6.h
+++ b/
include/configs/tqma6.h
@@
-1,7
+1,7
@@
/*
/*
- * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com>
+ * Copyright (C) 2013, 2014
, 2017
Markus Niebel <Markus.Niebel@tq-group.com>
*
*
- * Configuration settings for the TQ Systems TQMa6<Q,S> module.
+ * Configuration settings for the TQ Systems TQMa6<Q,
D,DL,
S> module.
*
* SPDX-License-Identifier: GPL-2.0+
*/
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@
-18,18
+18,20
@@
/* #endif */
/* place code in last 4 MiB of RAM */
/* #endif */
/* place code in last 4 MiB of RAM */
-#if defined(CONFIG_
MX6DL) || defined(CONFIG_MX
6S)
+#if defined(CONFIG_
TQMA
6S)
#define CONFIG_SYS_TEXT_BASE 0x2fc00000
#define CONFIG_SYS_TEXT_BASE 0x2fc00000
-#elif defined(CONFIG_
MX6Q) || defined(CONFIG_MX6D
)
+#elif defined(CONFIG_
TQMA6Q) || defined(CONFIG_TQMA6DL
)
#define CONFIG_SYS_TEXT_BASE 0x4fc00000
#endif
#include "mx6_common.h"
#define CONFIG_SYS_TEXT_BASE 0x4fc00000
#endif
#include "mx6_common.h"
-#if defined(CONFIG_
MX6DL) || defined(CONFIG_MX
6S)
+#if defined(CONFIG_
TQMA
6S)
#define PHYS_SDRAM_SIZE (512u * SZ_1M)
#define PHYS_SDRAM_SIZE (512u * SZ_1M)
-#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
-#define PHYS_SDRAM_SIZE (1024u * SZ_1M)
+#elif defined(CONFIG_TQMA6DL)
+#define PHYS_SDRAM_SIZE (SZ_1G)
+#elif defined(CONFIG_TQMA6Q)
+#define PHYS_SDRAM_SIZE (SZ_1G)
#endif
#define CONFIG_MXC_UART
#endif
#define CONFIG_MXC_UART
@@
-347,8
+349,6
@@
"panicboot=echo No boot device !!! reset\0" \
TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS \
"panicboot=echo No boot device !!! reset\0" \
TQMA6_EXTRA_BOOTDEV_ENV_SETTINGS \
-#define CONFIG_STACKSIZE (128u * SZ_1K)
-
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR