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Convert CONFIG_SPLASH_SCREEN et al to Kconfig
[platform/kernel/u-boot.git]
/
include
/
configs
/
thunderx_88xx.h
diff --git
a/include/configs/thunderx_88xx.h
b/include/configs/thunderx_88xx.h
index
5c3b3da
..
4d3c58d
100644
(file)
--- a/
include/configs/thunderx_88xx.h
+++ b/
include/configs/thunderx_88xx.h
@@
-1,7
+1,6
@@
+/* SPDX-License-Identifier: GPL-2.0+ */
/**
* (C) Copyright 2014, Cavium Inc.
/**
* (C) Copyright 2014, Cavium Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
**/
#ifndef __THUNDERX_88XX_H__
**/
#ifndef __THUNDERX_88XX_H__
@@
-13,17
+12,11
@@
#define CONFIG_SYS_64BIT
#define CONFIG_SYS_64BIT
-#define CONFIG_SYS_NO_FLASH
-
-#define CONFIG_IDENT_STRING \
- " for Cavium Thunder CN88XX ARM v8 Multi-Core"
-
#define MEM_BASE 0x00500000
#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
/* Link Definitions */
#define MEM_BASE 0x00500000
#define CONFIG_SYS_LOWMEM_BASE MEM_BASE
/* Link Definitions */
-#define CONFIG_SYS_TEXT_BASE 0x00500000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
/* SMP Spin Table Definitions */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
/* SMP Spin Table Definitions */
@@
-32,17
+25,12
@@
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
-#define CONFIG_SYS_MEMTEST_START MEM_BASE
-#define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE)
-
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
/* PL011 Serial Configuration */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
/* PL011 Serial Configuration */
-#define CONFIG_PL01X_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_PL011_CLOCK 24000000
-#define CONFIG_CONS_INDEX 1
/* Generic Interrupt Controller Definitions */
#define GICD_BASE (0x801000000000)
/* Generic Interrupt Controller Definitions */
#define GICD_BASE (0x801000000000)
@@
-50,23
+38,13
@@
#define CONFIG_SYS_SERIAL0 0x87e024000000
#define CONFIG_SYS_SERIAL1 0x87e025000000
#define CONFIG_SYS_SERIAL0 0x87e024000000
#define CONFIG_SYS_SERIAL1 0x87e025000000
-#define CONFIG_BAUDRATE 115200
-
-/* Command line configuration */
-#define CONFIG_MENU
-
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_BOOTP_PXE
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
/* Physical Memory Map */
/* Miscellaneous configurable options */
#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
@@
-79,26
+57,12
@@
"fdt_addr=0x94C00000\0" \
"fdt_high=0x9fffffff\0"
"fdt_addr=0x94C00000\0" \
"fdt_high=0x9fffffff\0"
-#define CONFIG_BOOTARGS \
- "console=ttyAMA0,115200n8 " \
- "earlycon=pl011,0x87e024000000 " \
- "debug maxcpus=48 rootwait rw "\
- "root=/dev/sda2 coherent_pool=16M"
-
/* Do not preserve environment */
/* Do not preserve environment */
-#define CONFIG_ENV_IS_NOWHERE 1
-#define CONFIG_ENV_SIZE 0x1000
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_LONGHELP
-#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#define CONFIG_NO_RELOCATION 1
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#define CONFIG_NO_RELOCATION 1
-#define CONFIG_LIB_RAND
#define PLL_REF_CLK 50000000 /* 50 MHz */
#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
#define PLL_REF_CLK 50000000 /* 50 MHz */
#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)