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Convert CONFIG_SYS_IMMR to Kconfig
[platform/kernel/u-boot.git]
/
include
/
configs
/
tegra186-common.h
diff --git
a/include/configs/tegra186-common.h
b/include/configs/tegra186-common.h
index
aa7b9d0
..
9685016
100644
(file)
--- a/
include/configs/tegra186-common.h
+++ b/
include/configs/tegra186-common.h
@@
-1,7
+1,6
@@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright 2013-2016, NVIDIA CORPORATION.
/*
* Copyright 2013-2016, NVIDIA CORPORATION.
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _TEGRA186_COMMON_H_
*/
#ifndef _TEGRA186_COMMON_H_
@@
-9,27
+8,20
@@
#include "tegra-common.h"
#include "tegra-common.h"
-/* Cortex-A57 uses a cache line size of 64 bytes */
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
/*
* NS16550 Configuration
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
/*
* NS16550 Configuration
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_STACKBASE 0x82800000 /* 40MB */
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
-#define CONFIG_SYS_TEXT_BASE 0x80080000
-
-/* Generic Interrupt Controller */
-#define CONFIG_GICV2
+#undef FDTFILE
+#define BOOTENV_EFI_SET_FDTFILE_FALLBACK \
+ "if test -z \"${fdtfile}\" -a -n \"${soc}\"; then " \
+ "setenv efi_fdtfile ${vendor}/${soc}-${board}${boardver}.dtb; " \
+ "fi; "
/*
* Memory layout for where various images get loaded by boot scripts:
/*
* Memory layout for where various images get loaded by boot scripts:
@@
-55,17
+47,11
@@
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
-#define CONFIG_LOADADDR 0x80080000
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
- "kernel_addr_r=" __stringify(CONFIG_
LOAD
ADDR) "\0" \
+ "kernel_addr_r=" __stringify(CONFIG_
SYS_LOAD_
ADDR) "\0" \
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"
-/* Defines for SPL */
-#define CONFIG_SPL_TEXT_BASE 0x80108000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80090000
-#define CONFIG_SPL_STACK 0x800ffffc
-
#endif
#endif