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Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
[platform/kernel/u-boot.git]
/
include
/
configs
/
tegra-common.h
diff --git
a/include/configs/tegra-common.h
b/include/configs/tegra-common.h
index
d8ae9d1
..
432ecea
100644
(file)
--- a/
include/configs/tegra-common.h
+++ b/
include/configs/tegra-common.h
@@
-25,7
+25,6
@@
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
/* Environment */
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
/* Environment */
-#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
/*
* NS16550 Configuration
/*
* NS16550 Configuration
@@
-40,15
+39,6
@@
#define CONFIG_SYS_MMC_MAX_DEVICE 4
/*
#define CONFIG_SYS_MMC_MAX_DEVICE 4
/*
- * select serial console configuration
- */
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-/* turn on command-line edit/hist/auto */
-
-/*
* Increasing the size of the IO buffer as default nfsargs size is more
* than 256 and so it is not possible to edit it
*/
* Increasing the size of the IO buffer as default nfsargs size is more
* than 256 and so it is not possible to edit it
*/
@@
-59,17
+49,18
@@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
+#ifdef CONFIG_ARM64
+#define FDTFILE "nvidia/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#else
+#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#endif
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
-#define CONFIG_NR_DRAM_BANKS 2
#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
@@
-89,7
+80,4
@@
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
#endif
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
#endif
-/* Misc utility code */
-#define CONFIG_BOUNCE_BUFFER
-
#endif /* _TEGRA_COMMON_H_ */
#endif /* _TEGRA_COMMON_H_ */